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Mask Engineer in a leading IT company 发信站: 饮水思源 (2006年12月07日15:59:44 星期四) Applicants please send your CV to: elyn.li@ Please be noted that this is a 3mths full time work which starts from Jan, 200 7. Mask Engineer Responsibilities: Plan, draw, assemble and verify simple to complex layout blocks, utilizing Cad ence/Hercules CAD tools. Follow physical and electrical design rules and estab lished layout methodologies to complete a variety of technical and non-repetit ive tasks associated with all phases of chip design. Requirements: 1. Bachelor degree or above majored in Micro Electric or EE 2. 1-2 years working experience is preferred. Postgraduates or universit y students with related intern experience is acceptable 3. Familiarity with and proficiency in CMOS physical design techniques a re required. 4. Good English skill 5. Good communication skill