Validation Engineer Intern@intel

Validation Engineer Intern@intel
发信站: 饮水思源 (2007年01月15日13:32:19 星期一)

Title: Validation Engineer Intern
Division: Digital Enterprise Group
Location: Shanghai
Deadline: 2007-1-25

Job Description: 
In this position, you will be joining DEG China Marketing group as an engineer
ing Intern. You will be responsible for engineering support (Design and Valida
tion) for ongoing projects as well as LAB set up, hands on hardware testing an
d so on. Your responsibilities will include but not be limited to: 
- Executing test procedures and working closely with development, marketing an
d validation engineers to analyze and debug problems 
- Helping set up new LAB facilities and infrastructure 
- Developing and documentation processes and/or methodologies for efficient va
lidation, 
- Assisting Mechanical, System, Thermal and different functional team on techn
ical area during product development

Qualification:  
You must be a post graduate student in Computer Engineering or Electrical Engi
neering or related major with IA architecture knowledge. Additional qualificat
ions include: 
- Familiarity with IA PC/Server building block, performance benchmarking and p
opular computer technology. 
- Good knowledge in CPU, Chipset, Bus, networking knowledge 
- Experiences of using Linux OS. 
- Software development using C#/or C++ and/or Windows* environment programming
 would be an added advantage 
- Team work, result orientation and good execution 
- Strong hands on experience knowledge of PC and server. 

Please send your resume both in Chinese and English to prc.college.program@int
 directly. Pls use the title of "Apply for Validation Engineer Intern (S
H)".