职位描述：
Roles & Responsibilities
1. Use analytical and simulation tools to generate design guidelines and stackups for high-speed boards and multi-gbps backplanes with cost and design tradeoffs in consideration.
2. Detailed placement and routing review for boards and backplanes.
3. Post layout simulation on boards as required.
4. Digital interconnect, high-speed I/O buffer analysis and simulation. Includes accurate timing and voltage margin analysis.
5. Signal integrity measurement and verification in the lab using high speed scopes, network and spectrum analyzers, BERT and other test equipment. 6. Experience with SERDES based interfaces running above 1Gbps and DDR/QDR memory and PCI interface would be advantageous.
Requirements
* Proficiency in HSPICE.
* Proficiency in simulating Serdes based designs.
* Proficiency in TDR based equipment and measurement capability.
* Proficiency in S-parameter modeling and measurement.
* Familiarity with tools like Sigrity, MATLAB.
* Familiarity with PCB fabrication technology and stackup design.
* Proficiency in a post-layout simulation tool (HyperLynx GHz).
* Familiarity with latest time and frequency domain test equipment.
* Good understanding of ASIC I/O development and high-speed digital system design and verification. Required Skills: HSpice, Spectraquest, Serdes based designs
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