Employees in Intel's Flash Memory Group deliver solutions for the world's fastest growing semiconductor segment, non-volatile memories. They invent, develop, bring to market and support customers with leading-edge NOR and NAND flash memory products. These products are used in a wide range of applications such as portable music players, cellular phones, notebook computers, digital cameras, video recorders, and many others. Our products make people's lives better by giving them unprecedented access to vital information, compelling entertainment and ubiquitous communication. This dynamic group is strategically positioned to become a serious player in the relatively new NAND market while retaining our number one position in NOR.
Description
Job Description:
Creates bottoms-up elements of chip design including but not limited to: FET, cell, and block-level custom layouts, FUB-level floor plans, abstract view generation, RC extraction, and schematic-to-layout verification and debug using phases of physical design development including parasitic extraction, static timing, wire load models, clock generation, custom polygon editing, auto-place and route algorithms, floor planning, full-chip assembly, packaging, and verification. Troubleshoots design issues and applies proactive intervention. May schedule staffing, execution, and verification of complex chips development and execution of project methodologies and/or flow developments.
Qualifications
Layout Engineer good English communication skill experience better
