北京铿腾电子科技有限公司上海分公司（Cadence）

Responsibility:Validate EDA software in ASIC design flow;Responsible for developing, applying, and maintaining quality standards for complex EDA software system;Develops and executes EDA software test plans;Analyzes and writes test standards and procedures;In charge of Customer Acceptance Test.Requirement:The candidate should have basic knowledge of HDL(Verilog preferred) and microelectronics. Knowledge of IC DESIGN flow is highly preferable;Previous experience of ASIC design (Cadence/Synopsys/Magma platforms) is highly preferable;Candidate must possess good Chinese and English communication skills;Candidate must have demonstrated strong problem solving skills, ability to work on large software systems;Highly motivated and passion to work is required. Detail focusing, performance oriented;Major in EE/CS, and all level of experiences are welcomed. MS is preferred.