上海澳佩通信科技有限公司招聘FPGA / ASIC Design EngineerFPGA / ASIC设计工程师

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Job Description:
 Whole ASIC/FPGA design flow, include specification, architecture, coding, benching, physical implementation and debugging

Job Requirements:
 Familiar with VHDL/VERILOG coding, benching, synthesis, floor plan, timing analysis, and lab debugging
 Experienced with the architecture design of complex communication AISC or FPGA
 Knowledge of SDH/SONET is a plus
 Experience in embedded software design is a plus
 Familiar with EDA tools such as DC, Simplicity, Models, etc.

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