SST China Ltd 冠捷半导体北京招聘

标 题: SST China Ltd 冠捷半导体北京招聘信息
发信站: 水木社区 (Fri Oct 12 09:58:09 2007), 站内

冠捷半导体（北京）研发中心（SST Beijing Design Center ）隶属于冠捷半导体（上海）有限公司（SST China Ltd.)。中心拥有一批具备丰富研发经验的工程师，主要由 IC数字设计，芯片固件（内部软件）开发，芯片样板设计和测试（FPGA/样片）队伍组成。作为母公司SST设在的北京研发中心，目前致力于高附加值的带有闪存的特殊应用芯片设计。中心的65系列，79系列和NAND FLASH控制器系列产品拥有了一批长期稳定的客户，如高端手持设备(Apple iPod nano播放器)，主板生产厂商(VIA)，遥控器OEM生产厂商(UEI)等。

中心总部冠捷半导体（上海）有限公司（SST China Ltd）是注册在张江高科技园区内的美商独资高科技企业，主要从事集成电路及软件产品的研发、设计和测试。

母公司是国际著名的半导体企业Silicon Storage Technology, Inc (SST)，是世界上主要闪存供应商之一。其成立于1989年，并于1995年11月在美国NASDAQ上市。SST入驻中国五年，正处于快速增长期，我们渴望追求卓越，致力于半导体行业的优秀人才加入；同时为您提供广阔的发展空间和畅通的晋升管道，具有竞争力的薪资、福利、津贴及假期。鲜亮的职场人生从这里起步，欢迎您的加入！

~~~~~~~应聘者请投递简历至hrchina@~~~~~~~~~

1.**Senior Firmware Engineer**
Job Description and Responsibilities:
- The candidate will design, develop and maintain firmware for subsystem product with embedded controller and NAND flash memory.
- The candidate will contribute to current product and also development future product.
- The firmware is a flash-based file system to serve as storage, such as replacement of hard disk and USB Flash drive.
- Ideal candidate must be independent, quick learner, and result oriented.

Key Competency Requirements:
- 丰富的嵌入式系统开发经验
- 精通C语言，有2万行以上code开发经验。
- 本科5年，研究生3年以上开发经验；
- 计算机及相关专业毕业；
- 使用过ARM等开发环境，有示波器等仪器使用经验；
- 熟悉微控制器和windows编程。
- Hand-on experience on embedded system software development.
- Proficiency in C, developed system with more than 20K lines of C code.
- Debug experience is desired, such as ICE, Logical Analyzer and Oscilloscope.
- Knowledge of storage device (such as hard disk, CD-rom, USB drive), microcontroller (8051, 6808, ARM), and Window programming will be a plus.

Education Required:
- BSCS/EE, MSEE/MSCE preferred

Experience Required:
- 5+ Year Experience required.

2.**System Engineer**
Job Description and Responsibilities:
- The candidate will need to work with logic designer to define/verify the SOC system on PCB board.
- The job responsibility including Board level design/debug, firmware developing and system level SOC chip verification
- Ideal candidate must be independent, quick learner, and result oriented

Key Competency Requirements:
- 精通C/C++，有丰富的底层编程经验；
- 精通PCB设计（原理图，版图），有丰富板级调试经验；
- 本科3年或研究生2年以上开发经验；
- 有FPGA使用经验。

3.**IC Design/Verification Engineer**
Job Description and Responsibilities:
- The candidate will need to work on MCU/SOC chip design/verification.
- The job responsibility including Whole chip/Block verification, RTL coding, develop Test model/Test patterns, write the design spec/test plan and Timing closure.
- The candidate might also need to work with backend team form net list to GDS.
- Ideal candidate must be independent, quick learner, and result oriented.

Key Competency Requirements:
- Hand-on experience on whole chip verification, RTL coding and timing closure.
- Familiar with Verilog, DC, Prime time shell scrip and place and backend flow experience is preferred.
- Knowledge of Circuit design, IDE, ATA, USB, 8051, ARM and DSP will be a plus.
- Speak and understand English.

Education Required:
BSCS/EE, MSEE/MSCE preferred.

Experience Required:
3+ Year Experience required

~~~~~~~应聘者请投递简历至hrchina@~~~~~~~~~

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