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标 题: 威盛电子三个实习生职位热招中!(Logic3/5 Verification Engineer,System Engineer)
发信站: 水木社区(临时站) (Wed Apr 2 15:33:06 2008), 站内
下述三个逻辑设计职位目前招聘正在进行中,工作成绩优秀者有转正机会。仅招收北京院校学生。外地院校请暂勿投递.
简历投递注意事项:
邮件标题:请以应聘+职位名称(否则系统可能自动滤掉部分简历)
简历投递信箱:hrbj_3@
工作地点:清华科技园威盛大厦
1)职位名称:Logic3 Verification Engineer
【部门】logic3
【招聘人数】:若干
【Responsibilities】
Logic design verifications.
【Requirements】
1. M.S/B.S in Computer Science or Electrical Engineering
2. Digital design or verification experience in IC or FPGA
3. Available for at least six months and four days a week.
4. Graduate students who will graduate in 2009 are preferred.
2)职位名称:Logic5 Verification Engineer
【部门】logic5
【招聘人数】:3
【工作内容】
logic design verification
【任职要求】
1. M.S/B.S in Computer Science or Electrical Engineering
2. Digital design or verification experience in IC or FPGA
3. Familiar with Verilog HDL, VIM, makefile, Familiar with Linux.
4. Available for at least four months and four days a week.
5. Graduate students who will graduate in 2009 are preferred.
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2) 职位名称:System Engineer
【部门】Logic3 A
【招聘人数】:1
【工作内容】
System level application
1. PCB schematics design
2. Circuit debug
【任职要求】
1. Familiar with PC system architecture and subsystem specification;
2. Knowledge of Circuit, board design, PCB layout and Signal Integrity;
3. Experience with system functional and compatibility debugging;
4. Familiar with FPGA/ARM system;
5. Familiar with C/C++ language(firmware) is a plus;
6. M.S/B.S in Computer Science or Electrical Engineering
7. Graduate students who will graduate in 2009 are preferred.
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