联发博动科技（北京）有限公司

Topic1: Test Control Unit (TCU) automation for both RTL and verification

Target /outcome: Build Perl or C based environment which can read in parameterized TCU spec in excel format and generate RTL with full functionality defined in spec and corresponding checkers for simulation or formal based verification
Tasks description:
1. TCU function study and excel formatted spec organization (1.5 weeks)
2. Scripting for TCU RTL automatic generation for basic function with instruction register only (4 weeks)
3. Extend the scripts/environment to support RTL automation with optional scannable output function (1 week)
4. Extend the scripts/environment to support RTL automation with optional two types of data register: Bypass Register and Boundary Register (4 weeks)
5. Extend the scripts/environment to support SVA checker for simulation or formal based verification (3~4 weeks)
6. DFT Pin Mux RTL and checkers automation (optional if time available. 3 weeks)
Technical Requirements:
Proficient in Perl/C and hardware description language (Verilog preferred)
Experienced in HDL coding and verification
Be familiar with System Verilog Assertion is plus


Topic2: Enhance current DBB testbench structure by using PLI/DPI

Target:
1. Create new verification IP, which can be quickly adopt in future project
2. Document of the VIP, which include VIP implementation details and its usage.
3. Trial the VIP on some design to demonstrate the feasibility and advantage.
Schedule:
1. Verilog and SystemVerilog PLI/DPI study (4 weeks).
2. VIP creation and document. (4 weeks)
3. Create demo to demonstrate the VIP usage. (3 weeks)
4. Prepare slides to introduce the VIP internal and usage, and report to whole team. (1 week)
Requirement:
1. Proficient in Verilog and SystemVerilog, and familiar with HDL simulator (VCS, LDV).
2. Proficient and experienced in C programming and with good debugging ability.
3. Knowledge of Verilog/SystemVerilog PLI/DPI.
4. Familiar with C++/Perl is a plus; familiar with Unix/Linux is preferred.

联发科技（MediaTek Inc.）是全球专业IC设计领导厂商，专注于无线通讯及数字媒体等技术领域。公司提供的芯片整合系统解决方案，包含无线通讯、高清晰度数字电视、光储存、高清晰度DVD等相关产品，其中光存储和DVD业务市场占有量居全球前列，数字电视业务居全球第三位前列。联发科技总部位于中国台湾，目前在美国、英国、丹麦、印度、新加坡、日本、韩国、中国等地设有16家分支机构，也是全球前十大IC无工厂设计公司中的亚洲公司。2007年9月，联发科技宣布收购全球领先的美国IC设计公司Analog Devices,Inc（ADI）旗下的Othello和 SoftFone手机芯片产品相关技术和团队，进一步奠定了其世界级IC设计厂商的领先地位。
　　联发博动科技（北京）有限公司（MediaTek （Beijing）Inc.）是联发科技在北京的全资子公司，专门从事手机MMI软件（Man-Machine Interface人机交互界面软件）研究和开发，包括了大量的2.5G/2.75G/3G应用软件、不同的Internet应用、多媒体应用（如camera, video player）和通讯应用整合。目前GSM/GPRS/EDGE手机芯片稳居中国市场首位，全球第三位，装机量每年已超亿台。
未来联发博动公司将秉持着持续创新的经营理念，不断的提供2.75G, 3G 嵌入式软硬件平台等相关应用软件，并协助中国手机厂商将高质量的手机推向国内外。

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