[北京]全球知名EDA公司Cadence2010校园招聘

全球知名EDA公司Cadence2010年校园招聘

Cadence Design Systems, Inc.是全球领先的EDA 软件开发商以及电子设计自动化解决方案提供商。全球知名半导体与电子系统公司均将Cadence软件作为其全球设计的标准。

Cadence上海研发中心成立于2005年12月，位于上海张江高科技园区微电子港，承担数字芯片设计，系统设计等各方面先进电子设计自动化工具的研发任务。此刻，我们期盼年轻而蓬勃向上的你们加入我们的团队，让我们共同努力，共同成长。请发送你的简历至job_china@ .

1.        Sr. Member of Technical Staff for MSR (Encounter Mixed Signal route)/ Power Route (Location: Shanghai)

Position Description:

Ø         The candidate will be responsible for the development and maintenance of Mixed Signal router/ power router.

Position Requirements:

Ø         Familiar with C/C programming on UNIX platform;

Ø         Familiar with the routing algorithm;

Ø         Familiar with Mixed Signal design and basic design rule/ power net structure and power planning/router;

Ø         Good English communication skill, both oral and written.

2.        Member of Consulting Staff for PNO (Encounter) (Location: Shanghai)

Position Description:

Ø         The candidate will be responsible for designing, developing and debugging software programs of power network optimization. 

Position Requirements:

Ø         Strong C/C programming skill on UNIX platform;

Ø         Experience with IC power planning/analysis is a plus;

Ø         Familiar with optimization algorithm;

Ø         Good English communication skill, both oral and written.

3.        Sr. Member of Technical Staff for Flipchip/TSV (Encounter) (Location: Shanghai)

Position Description:

Ø         The candidate will be responsible for designing, developing and debugging software programs of 3D IC design implementation and analysis.

Position Requirements:

Ø         Strong C/C programming skill on UNIX platform;

Ø         Experience with stacked chip designing/analysis is a plus;

Ø         EDA software development experience is a plus;

Ø         Good English communication skill, both oral and written.

4.         (Sr.) Member of Technical Staff for CTS (Location: Shanghai)

Position Description:

Ø         R&D engineer to do clock tree/mesh synthesis product (new feature development, design flow improvement as well as customer support).

Position Requirements:

Ø         Strong physical design (EDA) background (Digital IC);

Ø         CTS background is specially preferred;

Ø         Excellent programming skills (C/C , script);

Ø         Good English communication skill, both oral and written.

5.        Sr. Member of Technical Staff for Distributed Computing (Encounter platform development) (Location: Shanghai)

Position Description:

Ø         The candidate will be responsible for the development and maintenance of system infrastructure (Distributed computing) of Encounter platform in Cadence.

Position Requirements:

Ø         Programming skill on UNIX/Unix platform is must;

Ø         Strong C/C language coding skill;

Ø         Having parallel computing programming skill is a strong expected;

Ø         EDA software development experience is a plus;

Ø         Being Familiar with GUI application development, such as Open GL, Qt, tcl/tk, X is a plus;

Ø         Good English communication skill, both oral and written.

6.        Sr Member of Technical Staff for Silicon Virtual Prototyping (Location: Shanghai)

Position Description:

Ø         The candidate will be responsible for developing very complicated design prototyping system. Should be very strong in terms of C/C programming on UNIX platform as well as a good understanding about physical design (floor planning, P&R and Timing Analysis).

Position Requirements:

Ø         Excellent programming skills in C and C ;

Ø         CAD/EDA experience is a big plus;

Ø         Good English communication skill, both oral and written.

7.        Sr. Member of Technical Staff for SIP/3D IC (Location: Shanghai)

Position Description:

Ø         The candidate will be responsible for the development and maintenance of 3D IC and IC/package co-design.

Position Requirements:

Ø         MS above in CS/EE, familiar with C/C programming on UNIX platform;

Ø         Familiar with IC floorplan or package design is a plus;

Ø         Good English communication skill, both oral and written.

8.        Sr Member of Technical Staff for VSE (Location: Shanghai)

Position Description:

Ø         Responsible for designing and developing sub-systems and modules or components of hardware based verification products. In addition modifying, updating and productizing existing hardware based verification products. Perform as individual contributor on FPGA based design projects involving board design, RTL design, verification, productizing and documentation. Work on diverse problems related to FPGA design, simulation or verification issues.

Position Requirements:

Ø         The position requires BSEE, or equivalent, with industry experience in designing hardware systems;

Ø         Technical expertise in FPGA design for either Altera or Xilinx products is required;

Ø         Experience in FPGA design methodologies including high speed design, serial protocols and FPGA timing closure is desired;

Ø         In addition RTL design knowledge using Verilog is required along with experience in using RTL verification tools and flows;

Ø         Verification using with Cadence simulation products is desired;

Ø         Experience with scripting languages like Perl, TCL C-shell is strongly recommended. Experience with PCB tools is also desired;

Ø         Good English communication skill, both oral and written.

9.        Sr Member of Technical Staff for Debug Tool  (Location: Shanghai)

Position Description:

Ø         Responsibilities include working on emulation and co-simulation runtime command interface, GUI tools development, run control software/firmware interface and integration, and various runtime software modules for existing and future generation emulation systems.

Position Requirements:

Ø         Bachelor or Master Degree in EE/CS/CE;

Ø         C/C , Tcl/Tk and UNIX shell programming skills;

Ø         Prefer with Multi-threading, RPC and Socket programming experience;

Ø         Knowledges with Verilog or VHDL design language and logic design;

Ø         Good English communication skill, both oral and written, attention to details, and ability to work in multi-site/multi-person project;

Ø         EDA/CAD tool development experience or logic design verification experience.

10.    Sr Member of Technical Staff for Low Power  (Location: Shanghai)

Position Description:

Ø         Responsibilities include working on emulation and co-simulation runtime command interface, development of Dynamic Power Analysis (DPA) and Common Power Format (CPF) software tools for Palladium emulation system, and various core runtime software modules for existing and future generation emulation systems.

Position Requirements:

Ø         Bachelor or Master Degree in EE/CS/CE;

Ø         C/C , Tcl/Tk and UNIX shell programming skills;

Ø         Prefer with Multi-threading, RPC and Socket programming experience;

Ø         Knowledges with Verilog or VHDL design language and logic design;

Ø         Good English communication skill, both oral and written, attention to details, and ability to work in multi-site/multi-person project;

Ø         EDA/CAD tool development experience or logic design verification experience.

Cadence北京研发中心成立于2003年,主要协同美国总部共同研发Virtuoso全定制设计平台及其多模式仿真(multi-mode simulation)产品。 Virtuoso全定制设计平台是用于快速、硅精度设计的综合系统。Virtuoso平台包括：业界唯一的规格驱动的环境；使用通用语法、模型和方程式的多模式仿真；快速版图设计，用于0.18微米以下工艺的先进硅分析和全芯片混合信号集成仿真环境。使用该平台，设计团队可以用从1微米到45纳米的工艺迅速、准确、按时地设计出硅片. 此刻，我们期盼年轻而蓬勃向上的你们加入我们的团队，让我们共同努力，共同成长。请发送你的简历至 job_china@

1.        Senior PV Engineer for Circuit Simulator (Location: Beijing)

Position Description:

Ø         Plan and develop strategy to test Virtuoso Spectre Circuit Simulator and Virtuoso UltraSim Simulator.

Ø         Develop procedures, testcases, and designs to test, troubleshoot, and debug the products to make sure the products are performing up to the specifications and upholding software quality standards.

Ø         Work closely with a group of professionals to enhance product quality.

Ø         Develop Perl scripts or shell scripts to automate test procedures.

Position Requirements:

Ø         MS or above majored in EE/CS.

Ø         Strong background in analog circuit design. Familiar with Virtuoso Spectre Circuit Simulator, Virtuoso UltraSim Simulator, or other commercial circuit simulators.

Ø         Teamwork and good communication skills.

Ø         Good at both written and spoken English.

Ø         Programming experience in Perl or shell script is a big plus.

Ø         Software testing experience is a big plus.

2.        Senior PV Engineer for SpectreRF (Location: Beijing)

Position Description:

Ø         Plan and develop strategy to test Virtuoso SpectreRF Circuit Simulator and Simulator Interface in Virtuoso ADE (Analog Design Environment).

Ø         Develop procedures, testcases, and designs to test, troubleshoot, and debug the products to make sure the products are performing up to the specifications and upholding software quality standards.

Ø         Work closely with a group of professionals to enhance product quality.

Ø         Develop Perl or shell scripts to automate test procedures.

Position Requirements:

Ø         BS/MS or above majored in EE/CS.

Ø         Strong background in RF/analog circuit design. Familiar with Virtuoso SpectreRF Circuit Simulator or other commercial RF circuit simulators.

Ø         Good experience on Customer IC design on Virtuoso platform.

Ø         Teamwork and good communication skills.

Ø         Good at both written and spoken English.

Ø         Knowledge in Cadence SKILL language is a big plus.

Ø         Programming experience in Perl or shell script is a big plus.

Ø         Software testing experience is a big plus

3.        Member of Technical Staff for RF/EM SOLVER  (Location: Beijing)

Position Description:

Ø         The position is responsible for designing, implementing and maintaining EM solver.  

Ø         The engineer will be responsible for supporting development efforts through the development process, including writing specifications based on marketing and product requirements, designing and implementing product improvements and fixes.

Ø         Candidate may need to work with other global R&D teams.

Position Requirements:

Ø         Education Requirement: Master in EE/CS/related research area.

Ø         Strong background in numerical computation and programming.

Ø         Hands-on experience in programming with C/C .

Ø         Working experience in RFIC/Microwave or in related EDA industry is big plus. Background in EE knowledge is plus.

4.        Member of Technical Staff for FastSpice (Location: Beijing)

Position Description:

Ø         Debug and develop Cadence circuit simulation technologies in Cadence Fastspice.

Ø         Be responsible for writing specifications, designing and implementing product enhancements and fixes.

Ø          Needs to work with other global R&D teams.
 

Position Requirements:

Ø         Education requirement: Master or Ph.D. in EE/CS/related research area.

Ø         Must be skilled in C/C programming, familiar with development under Linux/Unix environment.

Ø         Knowledge of Analog Mixed-signal design and semiconductor device.

Ø         Experience with scripting language and numerical skills is a plus.

Ø         Good English communication skills both verbally and in writing.

5.        Member of Technical Staff for AMS Simulator development (Location: Beijing)

Position Description: 

Ø         Develop, enhance and maintain mixed signal circuit simulator which support Verilog-A, Verilog-AMS, VHDL-AMS in spice netlist, with some direction from manager or senior engineers  

Position Requirements: 

Ø         Familiar with Spice, Verilog, Verilog-A, Verilog-AMS, VHDL-AMS language

Ø         Analog circuit or digital simulator development experiences

Ø         Skilled in C programming, familiar with development under Linux/Unix environment.

Ø         Be familiar with Analog Mixed-signal design is a plus

Ø         EE or CS Master Degree with at least 2 years EDA related working experience or above  

6.        Sr. Member of technique Staff for AMS simulator development （Location： Beijing）

Position Description:

Ø        Develop, enhance and maintain mixed signal circuit simulator which support Verilog, Verilog-A, Verilog-AMS, VHDL, VHDL-AMS and SystemVerilog.

Position Requirements:

Ø        Familiar with Spice, Verilog, Verilog-A, Verilog-AMS, VHDL-AMS language

Ø        Skilled in C programming, familiar with development under Linux/Unix environment.

Ø        Analog circuit or digital simulator development experiences

Ø        Be familiar with Analog Mixed-signal design is a plus

Ø        EE or CS Master degree with at least 2 years related working experience or above