- 工作地点：上海
- 职位：Hardware Design Engineer|Signal Integrity Engineer
- 信息来源：华南木棉bbs
说明：
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Cisco CDRC is hiring 2 full-time engineers - Hardware Design Engineer and Signal Integrity Enginee.
- Location: Shanghai
- Prefer 2011 graduates or candidates with 1 to 2 years working experiences since these are university recruitment req
- Preferred on board time: July to Sept. 2011
HW
Responsibilities:
- Participates on a project team of engineers involved in the specification, design, development and test of hardware for networking products.
- Design hardware solutions and work in the team to develop boards.
- Interfaces cross-functionally at the working team level.
- Work closely with ASIC, DFT, diagnostics, software and mechanical developers throughout the development process.
- Job involves set up and monitoring EDVT units.
Requirements:
Must have skill/experiences
- Experience in high speed circuit design is critical.
- Experience in board level debugging.
- Familiar with VHDL or Verilog language
- Familiar with ECAD tool, such as Cadence Concept/Allegro, Metor DxDesigner, or Protel.
Good to have skill/experiences
- Networking knowledge such as TCP/IP
- Hspice, IBIS simulation
- Fluent in communication in English
Educational Background
- Typically requires MSEE/CS/Automation Control
- 0 to 2 years working experiences
SI
Responsibilities include:
- High speed PCB design
- Electrical Modeling and simulation using Electromagnetic modeling tools
- Measurement correlation using TDR and Vector network analyzer
- Understanding of transmission lines, electromagnetic and microwaves
- High speed serdes simulation
- Memory interface (DDR2, DDR3) modeling and simulation
- PCB power distribution network design
If you are interested in the above position. Please forward you CV to zhaye@ or submit your CV to urhiring@cisco.com.
Best Regards,
如何写一份简单、直接、高效的求职信？-10倍提供求职命中率！
@YingJieSheng.COM
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