意法深圳招聘职位：analog labout engineer

我司设计中心目前有一analog layout Engineer 职位空缺，具体的职位要求如下：

Job Title: Layout Design Engineer

Work Location: Shenzhen

 

Job Responsibilities:

Analog layout design for Smart power IC, from schematic to GDSII;

Analog cell layout, DRC/LVS/ERC physical verification and ICPack check;

 

Requirements:

Bachelor degree in Semiconductor, Electronics Engineering areas;

Good understanding of semiconductor theory and structures of devices;

Fluent and well spoken English mandatory (frequent communication with overseas teams);

Teamwork, flexibility & initiative;

 

Remark: we may only accept English CV, and kindly please mark the job title in the subject and send your application to sz-apdc@ .

目前是否有应届毕业生对该职位有意向考虑？ 如果可能，能否请他们将简历发送至  sz-apdc@