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[上海]澜起科技2012招聘

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澜起科技招聘启事
【文章作者 montage 发布时间 2012-8-20 13:33:27 阅读次数 8 】

澜起科技(上海)有限公司(Montage Technology (Shanghai) Co., Ltd.)创立于20045月,下属澜起科技(上海)有限公司、上海澜起微电子有限公司、澜起半导体(上海)有限公司、苏州澜起微电子科技有限公司四家子公司以及澜起科技杭州分公司,另外还在韩国、美国等地设有办公室。共有员工近400人。

澜起科技集团总部位于上海漕河泾开发区内;苏州澜起微电子科技有限公司位于苏州工业园区内;澜起科技杭州分公司是成功收购杭州摩托罗拉科技有限公司的机顶盒SOC芯片设计团队而成立的,位于滨江国家高新开发区内。

澜起科技集团是一家专业从事集成电路设计、开发和销售的企业。公司的设计研发平台包括了射频、数模混合、数字信号处理以及音频/视频信号处理的尖端技术,专注于数字企业及数字家庭领域市场。在数字企业方面,澜起科技拥有国际领先的高速、低功耗的芯片设计技术,开发的应用于新一代服务器的内存缓冲器系列芯片,已成为全球云计算网络数据中心不可或缺的关键器件。在数字家庭领域,澜起科技拥有高清、标清数字电视接收的全套解决方案,产品涵盖卫星、地面和有线等各个领域。

澜起科技集团自成立以来,不断的得到国家和业界的认可和鼓励,并获得可喜的成绩和奖项:自2006年起,公司连续被授予上海市高新技术企业称号,并获得英特尔技术基金投资支持。2008年被EET中国评为最具有潜力的IC设计公司,并入选德勒(Deloitte Technology)高科技、高成长亚洲50强。2011年,入选“红鲱鱼”(Red Herring) 2011年度全球百强,并成为亚洲地区获此殊荣的唯一一家半导体企业。

随着公司的迅速发展,澜起科技不断面向社会和学校,广纳英才,我们的优势在于:

<!--[if !supportLists]-->1.  <!--[endif]-->工作环境与作风:自由度大,宽松友好工作环境;务实、执着、专注的工作作风;公司注重员工工作与生活的平衡,为员工提供兴趣发展的平台,鼓励员工健康生活,快乐工作。

<!--[if !supportLists]-->2.  <!--[endif]-->学习和成长平台:公司集模拟、射频、数字、数模混合、信号处理等多领域的行业专家以及优秀开发团队,为员工提供专业深入的带教和辅导,帮助员工迅速成长并不断提高专业研发水平;产品研发涉及从前端到后端各个领域,员工在术有专攻的基础上,不断拓宽、积累知识和经验。成立8年来,已申请中国和美国专利70多项,充分展示了公司科技研发团队的实力。

<!--[if !supportLists]-->3.  <!--[endif]-->职业路径与发展空间:公司为员工设计了清晰可行的专业及管理双通道的职业发展路径,在发挥员工优势的基础上,更关注员工工作与兴趣的结合,给予员工更多不同的职业发展选择。

<!--[if !supportLists]-->4.  <!--[endif]-->薪酬与未来前景:除了为员工提供有竞争力的薪酬与多样化的福利,公司还根据员工的发展潜力以及绩效,提供股票与期权的奖励。公司上市时,员工可以享受到更为丰厚的回报。

 

接收简历邮箱:hr@

 

澜起科技,欢迎您的加入!

 

TITLE: Senior Image Processing Engineer

职位:(资深)图像处理工程师

POSITION NO.: RD-SOC-IP

 

JOB DESCRIPTION

<!--[if !supportLists]-->-     <!--[endif]-->Multi-format video decoder firmware development

<!--[if !supportLists]-->-     <!--[endif]-->Video encoder firmware development

<!--[if !supportLists]-->-     <!--[endif]-->Participate in projects and work with hardware & software engineers for product development

 

QUALIFICATION:

<!--[if !supportLists]-->-     <!--[endif]-->MSEE or Ph.D. in EE

<!--[if !supportLists]-->-     <!--[endif]-->In depth knowledge in MPEG/AVS/H264 system, experience in VC-1 and real format is a plus

<!--[if !supportLists]-->-     <!--[endif]-->In depth knowledge in MIPS/ARM is a plus

<!--[if !supportLists]-->-     <!--[endif]-->Hands-on with,C, Matlab etc.

 

 

TITLE: (senior) video/audio algorithm engineer

职位:音视频算法工程师

POSITION NO.: RD-SOC-IP

 

JOB description

<!--[if !supportLists]-->n  <!--[endif]-->Develop video/image/audio post-processing algorithm

<!--[if !supportLists]-->n  <!--[endif]-->Build c model for algorithm and cooperate with HW/SW team for implementation

 

Qualification

<!--[if !supportLists]-->n  <!--[endif]-->MSEE or Ph.D. in EE

<!--[if !supportLists]-->n  <!--[endif]-->Solid knowledge on video/image/graphics sampling and formats and color space

<!--[if !supportLists]-->n  <!--[endif]-->Experience in some of related fields: de-interlacing, scaling, video/picture enhancement, de-noising, audio-postprocesing, rate conversion, filter design, graphics processing

<!--[if !supportLists]-->n  <!--[endif]-->Experience or knowledge on hardware/software design for ASIC/SOC is a plus

<!--[if !supportLists]-->n  <!--[endif]-->Hands-on with C, Matlab.

 

 

JOB TITLE: IC Design Engineer

职位:IC设计工程师

POSITION NO.: RD-SOC-Design

 

JOB DESCRIPTION:

- Module-level architecture definition and design

- Module-level RTL implementation

- Simulation/Verification at both module level and system level

- Module-level synthesis and timing analysis

- Writing design spec and report

- FPGA/silicon debug on related modules

 

QUALIFICATIONS:

- MSEE

 - Solid knowledge on digital IC design

- Strong skills of Verilog RTL coding and simulation

- Familiar with C language

- Hands-on experiences on EDA tools, such as Cadence and Synopsys tools

- Relevant experiences on video display design/mpeg/demux/descramble are plus

- Hardworking and self-motivated

- A team player

 

 

TITLE: IC Design Engineer

职位:IC设计工程师

POSITION NO.: RD-DIG

 

JOB DESCRIPTION:

<!--[if !supportLists]-->-       <!--[endif]-->RTL or behavior level logic coding for modules.

<!--[if !supportLists]-->-       <!--[endif]-->Module level synthesis/timing analysis.

<!--[if !supportLists]-->-       <!--[endif]-->Writing complete design/verification reports.

<!--[if !supportLists]-->-       <!--[endif]-->Simulation/Verification of functionalities at both module level and top level.

<!--[if !supportLists]-->-       <!--[endif]-->Silicon debug of the related module functionalities.

<!--[if !supportLists]-->-       <!--[endif]-->Writing test patterns for production tests.

 

QUALIFICATION:

<!--[if !supportLists]-->-       <!--[endif]-->BSEE or MSEE

<!--[if !supportLists]-->-       <!--[endif]-->Good English writing and reading skills.

<!--[if !supportLists]-->-       <!--[endif]-->Solid knowledge of digital design building blocks (Data-path, Synchronizer, FIFO...)

<!--[if !supportLists]-->-       <!--[endif]-->Strong skills of Verilog RTL coding, verification and debug.

<!--[if !supportLists]-->-       <!--[endif]-->Solid knowledge of EDA tools such as Cadence NC-Sim, Synopsys DC, PT, Debussy etc.

<!--[if !supportLists]-->-       <!--[endif]-->Familiar with Computer languages C, C , and one script language perl or python.

<!--[if !supportLists]-->-       <!--[endif]-->Familiar with System-verilog language is a plus.

<!--[if !supportLists]-->-       <!--[endif]-->Relevant experiences in DDR interface or MCU/FPGA design is a plus

<!--[if !supportLists]-->-       <!--[endif]-->Good communication skill, team work spirit, self-motivated.

 

 

TITLE: IC Design Engineer

职位:IC设计工程师

POSITION NO.: RD-ALG

 

JOB DESCRIPTION:

-         Design, evaluate and verify CMOS analog circuits.

-         Oversee layout and verification activities which include floor plan, LVS and DRC.

 

QUALIFICATION:

-         BSEE or MSEE.

-         Good fundamental in analysis and design of analog / mixed-signal circuits.

-         Experience in Verilog, AHDL and/or Matlab.

-         Ability to do layout and provide verification/debugging guidance.

-         Solid knowledge of EDA design tools. (Analog artist, spectre, HSPICE and nc-verilog ...) 

-         Familiar with Computer languages such as C, C , perl.

-         Experience in any of the following areas is preferred: PLL, high-speed I/O’s.

 

 

TITLE: IC Design Engineer

职位:IC设计工程师

POSITION NO.: RD-ALG-RF

 

JOB DESCRIPTION:

<!--[if !supportLists]-->-          <!--[endif]-->RF/analog IC design for tuners and receivers for multi-standard TV’s and other wireless systems

<!--[if !supportLists]-->-          <!--[endif]-->Design and layout of IC blocks, such as LNA, mixer, VGA/PGA, LPF/BPF, VCO, crystal oscillator, PLL, ADC and DAC

<!--[if !supportLists]-->-          <!--[endif]-->Simulation of RF and analog circuits and systems in Spectre/SpectreRF and Matlab

<!--[if !supportLists]-->-          <!--[endif]-->Testing and characterization of IC blocks and chips in lab, and ATE and field environments

<!--[if !supportLists]-->-          <!--[endif]-->IC process and package evaluation including device modeling and PDK

 

QUALIFICATION:

<!--[if !supportLists]-->-          <!--[endif]-->MS or PhD in electric and electronic engineering

<!--[if !supportLists]-->-          <!--[endif]-->Understanding receiver architectures for multi-standard TV products and other wireless systems

<!--[if !supportLists]-->-          <!--[endif]-->Hands-on experiences in design of IC blocks to chip top levels in deep submicron CMOS technologies

<!--[if !supportLists]-->-          <!--[endif]-->Proficient with simulation tools (Spectre/SpectreRF) and oversight of layout design

<!--[if !supportLists]-->-          <!--[endif]-->Demonstrated ability for characterization of block and chip performances in lab and ATE environments

<!--[if !supportLists]-->-          <!--[endif]-->Strong communication skills and also excellence as team player.

 

 

TITLE: Signal Processing Engineer

岗位名称:信号处理算法工程师

POSITION NO.: RD-DSP

 

JOB DESCRIPTION:

- Advanced communication system R&D

- Signal processing algorithm implementation for data communication

- Participate in projects and work with hardware & software engineers for product development,debug & test support

 

QUALIFICATION:

- Ph. D or MS of related background

- Top student with strong self motivation; experienced candidate should have working knowledge in the area of digital communication

- All candidates are expected to have in depth knowledge in the area of digital communication

- Good communication skill, team work spirit, strong self-motivated

- Hands-on with Matlab, C/C , etc.

 



本信息分专业需求人数:
专业代码专业名称需求人数
080903微电子学与固体电子学10
081000信息与通信工程10
081001通信与信息系统10


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