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[北京]Cadence公司2013招聘宣讲会 北京理工大学专场

(全职,发布于2012-10-19) 相关搜索
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Cadence 2013 校园招聘职位
 
CadenceNasdaq: CDNS是全球领先的EDA (Electronic Design Automation)软件开发商以及电子设计自动化解决方案提供商.我们的产品涵盖了电子设计的整个流程,包括系统级设计,功能验证,IC综合及布局布线,模拟、混合信号及射频IC设计,全定制集成电路设计,IC物理验证,PCB设计和硬件仿真建模等。全球知名半导体与电子系统公司均将Cadence软件作为其全球设计的标准。公司网站ww***.cn[点击查看]
 
欢迎软件工程、计算机科学、微电子、集成电路、数学等相关专业的2013年及之前毕业的硕士生和博士生投递CVjob_china@简历命名:姓名-学校-专业-学历-投递职位名称对职位有任何疑问,也可发邮件至该信箱,我们HR同事会及时给你回复并尽快安排面试。
 
Cadence 2013年校园宣讲会
宣讲时间
学校名称
宣讲地点
备注
1026
19:00-21:00
北京理工大学
研究生楼514
现场安排笔试,并有精美礼品赠送
 
R&D
1. Senior Software Engineer - Characterization RD (Location: BJ)
Position Description
The positions are for a developer who will be responsible for designing, implementing, and maintaining library characterization and validation software for use with standard cells, memory and macro blocks, and IO cells.
Position Requirements
1.The candidates should have two or more years of experiences in developing EDA software. 
2.Must be proficient in C, C , TCL, and development in Linux/Unix.
3.Knowledge on semiconductor device is strong plus.
4.Experience with SPICE or SPICE-like circuit simulation is important.   
5.Knowledge of Verilog and VHDL is also highly desirable.   
6.Have a good understanding of library characterization, IP design, static timing analysis, power analysis, and signal integrity analysis flows.
7.Minimum Education Required / Minimum Experience Required : MS, EE, CS, Math or Physics 2
8. Preferred Education / Preferred Experience: Ph.D. , EE, CS, Math or Physics 3-5
 
2. Senior Software Engineer (Location: BJ)
Position Description
-The position is for analog circuit simulation engineer responsible for designing, implementing and maintaining device compact models in SPICE-like circuit simulation software for use with analog, RF and mixed signal circuit simulators. The engineer will be responsible for leading multiple development efforts through the development process, including writing specifications based on marketing and product requirements, designing and implementing product improvements and fixes, and working with a cross-functional team to ensure the software is tested, integrated and documented. The engineer must be proficient in C/C Unix development, and have a thorough knowledge of device physics, device compact models. The engineer must have a proven ability to learn from and work with an engineering and cross-functional team to deliver innovative products in a production environment.
Position Requirements
1.Well devices physics, device compact models;
2.Familiar with matrix solver & mathematic calculation;
3.Familiar with Spice, Spectre format & usage;
4.Skilled in C programming, familiar with development under Linux/Unix environment;
5.Be familiar with Analog-signal design is a plus;
6.Good English communication skill both verbally and writing;
7.Good problem solving skill and team work spirit;
 
3. Senior Software Engineer - Cadence Virtuoso Environment (Location: BJ)
Position Description
The Cadence Virtuoso platform powers all of the latest design innovations in consumer, mobile and enterprise electronics worldwide. We are looking for an exceptional senior software engineer to join our team and contribute to the continued growth and success of the company’s flagship product. In this high-impact career opportunity, you will lead design and development of cutting-edge features of some of our most exciting new products, with an emphasis on circuit simulator integration in the Virtuoso ADE/ADE XL environment. You will contribute both individually and as a technical lead, working with a cross-functional team in Beijing and San Jose to ensure that our software is developed, tested, and documented with high quality.
Position Requirements:
1.Exceptional C programming and familiarity with Linux/Unix development.
2.Experience with GUI frameworks, such as Qt.
3.Strong scripting language skills in one or more of: Python, Perl, Lisp, Tcl.
4.Proficiency with build and version-control systems.
5.Excellent written and oral English communication skills.
Preferred Skills
6.Coursework or work experience in electronic circuit design.
7.Exposure to the Cadence Virtuoso environment or other electronic design platforms.
Education
8.B.S. in engineering, computer science or related field. Graduate degree preferred.
 
4. Senior Software Engineer, Simulation Integration (Location: BJ)
Position Description
World’s leading design companies rely on Cadence technologies to deliver the latest design innovations in consumer, mobile and enterprise electronics. We are looking for exceptional software engineers to join our team and contribute to the continued growth and success of the company’s flagship products, such as Virtuoso Spectre and Virtuoso ADE. In this high-impact career opportunity, you will develop cutting-edge features of some of our most exciting new products, with an emphasis of scripting language development and GUI integration. You will work with a cross-functional team in Beijing and San Jose to ensure that our software is developed, tested, and documented with high quality.
Position Requirements:
1.Strong C programming and familiarity with development under Linux/Unix environment
2.Experience with GUI frameworks, such as Qt.
3.Strong scripting language skills in one or more of: Python, Perl, Lisp, Tcl
4.Proficiency with build and version-control systems.
5.Good English communication skill both verbally and writing.
6.Good problem solving skill and team work spirit.
Preferred Skills
1.Experience in the use of parser generators, such as Antlr or Yacc/Lex
2.Exposure to circuit simulators, such as SPICE, HSPICE and Spectre.
3.Coursework or work experience in analog, RF or mixed-signal circuit design
Education
1.B.S. in engineering, computer science or related field.
 
5. Software engineer for Virtuoso ADE XL (Location: BJ)  
6. Senior Software Engineer –Placement (Location:SH)
7. Senior Software Engineer for Floorplan (Location:SH)
8. Senior Software Engineer for Encounter Hier Solution Team (Location:SH)
9. Senior software engineer (Database development for Encounter platform) (Location:SH)
 
PE
1. Senior/Principal Product Engineer – Characterization (Location: BJ)
Position Description
1.The Altos Product Engineer (PE) works with key customers to understand their library characterization challenges, maps
2.Customer needs into product requirements, and collaborate with the R&D and PV organization to ensure that the product
3. Implementation addresses the customers real needs.
4.The Altos PE plays a pivotal role in defining and deploying Cadence’s library characterization products and solutions at key customersthat enables them to do characterization at a very high performance & efficiency.
5.This position requires problem discovery and analysis at customer site, assessment of possible solutions, collaborating with RD and customer to develop and test the solution, and managing it’s deployment at the customer site.
Position Requirements:
1.The candidate should possess minimum a Bachelors technical degree and 3-5 years of industry experience
2.Minimum 3 years hands-on, expertise on library characterization, IP design, static timing analysis, power analysis, and signal integrity analysis flows.
3.Hands on Design experience using Verilog, VHDL
4.Experience with SPICE or SPICE-like circuit simulation is strong plus
5. Knowledge on semiconductor device is strong plus.
6.Knowledge on competitor characterization flow and tools is a plus
7.Highly technical & hands on engineer with an ability to partner with key customers and provide expert support to field application engineers.
8.The candidate must be able to drive R&D and Application engineers and have passion to make customers successful.
9.He/She must be willing to travel worldwide in order to work closely with customers in any part of the world.
10.Passionate about adopting and promoting new technologies and making customers successful.
11.Successful in building and delivering training content on rolling out new products/methodologies
12.Very good communication skills and a strong desire for working in a global environment with customers Developers, marketing and sales.
13.English fluency is a must, Korean speaking language is a plus
 
SOC R&D
1.Design Engineer – Analog circuit Engineer (Location: SH)
2.Design Engineer – Algorithm & Architecture Engineer (Location: SH)
3.Design Engineer – Digital Frontend Engineer (Location: SH)
 


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