[西安]西安华芯半导体有限公司2013招聘

西安华芯半导体有限公司应届生招聘简章

我们提供先进的设计开发环境，优厚的薪酬待遇，完善的休假体系，全面的社会及商业保险。诚邀有志IC事业的人才加盟共同发展！

Xi'an Sinochip Semiconductors can provide advanced design and working environment, competitive salary, perfect vacation system, comprehensive social and commercial insurance system. Welcome to join us!

岗位介绍及要求如下， 有意者请将中文及英文简历发至:hr-xian@

岗位职责及要求：

1）数字后端设计工程师ASIC Backend Design Engineer (BE)

Requirements:

1.Either Master or PhD in Microelectronics, Electronic Engineering, or related field.

2.Knowledge of Synopsys/Cadence automatically physical implementation tools and flows (IC-Compiler/ Astro / SOC-Encounter/ Milky-way/ Star-RCX) is a plus.

3.Knowledge of one or more scripting languages (Perl, TCL, or Shell) to make reusable automatically flow is a plus.

4.Knowledge of FE design (RTL code, flow) and verification is a plus.

5.Good analytical and debugging skills.

6.Good command of English.

2）设计验证工程师Design and Functional Verification Engineer (DFV)

Requirements:

1.Either Master or PhD in Microelectronics, Electronic Engineering, or related field.

2.Knowledge of Verification language (SPECMAN/E-language, System-Verilog, Vera) is a plus.

3.Knowledge of RTL coding and simulators (Modelsim, NC-sim) is a plus.

4.Basic knowledge of script language (Perl, TCL, C-language and so on)

5.Knowledge of 2G/3G/LTE handset base band Architecture, ARM, AHB Architecture is a plus.

6.Knowledge about Base band chip peripheral(USB2.0/USB3.0, SSIC, MIPI) is a plus.

7.Team oriented, love to work in young, international and highly motivated teams.

8.Good command of English

3）可测性设计工程师Design for Test Engineer (DFT)

Requirements:

1. Either Master or PhD in Microelectronics, Electronic Engineering, or related field.

2. Basic knowledge of IC design flow, including coding, simulation, verification, synthesis and STA

3. Good understanding of the General DFT methodology such as BIST, SCAN,JTAG and ATPG.

4. Familiar with basic Mentor/ Synopsys DFT flow and tools

5. Proficient in Verilog/VHDL language

6. Be familiar with Shell/TCL/Perl program, or skilled in C program

7. Good English communication skills

4）数字电路设计工程师 Digital Design Engineer

Requirements:

1. Either Master or PhD in Microelectronics, Electronic Engineering, or related field.

2. Knowledge of digital design (verilog /schematic) and simulation (modelsim,NC-sim, Nanosim) is a plus.

3. Team oriented, love to work in young, international and highly motivated teams.

4. Good communication skills and High grade of flexibility.

5. Highly motivated and engaged.

6. Knowledge of Flash、SRAM and DRAM design is preferred.

7. English language skill in writing and speaking is a must.

 

• 公司地址：西安市高新区高新六路38号腾飞研发中心A座4楼
• 公司电话: 029-88318000 ext.8411（人力资源部）
• Email: hr-xian@
• 公司网址：ww***com[点击查看]