[上海]奥可纳软件技术（上海）有限公司（Akuna Capital）

公司总部位于美国芝加哥，在上海，波士顿设有分部，我们是美国最大的期权产品做市商之一。交易主要集中在芝加哥商品交易所，芝加哥期权交易所，ISE, 纽约证券交易所，和纳斯达克市场, 涉及的产品包含股票指数期权，利率期权及期货 (国债) ，外汇期权以及商品(谷物，牲畜，石油，和黄金)期货期权。我们有经验丰富的优秀交易员和创新开拓的IT精英。Akuna上海目前正在组建团队，打造最前沿的期权交易系统。在这里，你可以更加接近市场，接触到交易策略。这里是技术和市场结合最前沿的地方。

Akuna Capital is a derivatives trading firm headquartered in downtown Chicago that specializes in market making and arbitrage.  Akuna started with five employees in 2011 and we now have over 140. In 2014 we grew by 84%, opening our first international office in Shanghai. Our founders remain a strong part of the company and work alongside junior members, building Akuna together. We compete directly with the largest market making and arbitrage firms in the world. We develop our own software strategies, algorithms, and models. We also have floor traders so we are not entirely an electronic firm. We have no clients and trade only using the firm’s own money from its partners. We use cutting-edge technology to build our low latency platform. Unlike other firms, we do not have legacy code and are therefore able to implement new strategies to be more agile in the creation of our trading systems. Other trading firms keep their quant, development, and trading teams very separate.

Key skill: ASIC design, RTL design, FPGA, English

We are seeking Junior Hardware Developers to join one of the newest teams at Akuna and make an impact! ?In this role you will work alongside our experienced trading and software team to design and implement elegant solutions to complex and interesting problems.?

What you’ll do as a Junior Hardware Developer:

Junior Developers at Akuna have the opportunity to use cutting-edge technology while working on high performance/low latency systems.? We offer a team-based approach to trading and hardware/software engineering, believing that productive integration of these groups is vital for success in this industry.?

What would make you a top-notch candidate?

• Pursuing a BS/MS/ PhD in Engineering, Computer Science, Math, Physics or related field
• Experience with digital logic design or ASIC design, preferably using Verilog or System Verilog
• Experience with distributed/parallel systems
• Strong analytic and problem-solving skills
• Good English communication skill
• Create an easily understood and testable design that can change as quickly as market conditions require
• Passion for innovation and building systems from the ground up
• Ability to adapt to an ever-changing environment
• Major GPA of 3.0 or above
• Available to start April or June 2017