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[北京]超威半导体(上海)有限公司

(全职,发布于2016-10-10) 相关搜索
  • 工作地点:北京
  • 职位:Engineer for IC design verification (北京)
  • 信息来源:前程无忧(51JOB)
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职能类别:IC验证工程师

Requirements

  • Understand basic digital ASIC/SOC concept
  • Understand basic digital ASIC/SOC flow
  • Strong C/C++ software development experiences
  • Be familiar with scripting language, such as Perl, C shell, Makefile.

It is a plus if the candidate has one or more of the following experience/knowledge, such as X86/ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, USB(3.0/2.0/1.1; HSIC/host/device/OTG) system, NAND Flash host controller/BCH/double-data-rate interface, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc.

The candidate is expected to exhibit good verbal and written communication skills in both Chinese and English, imaginative thinking and sophisticated analytical techniques, self-driven for quality and timely result, capability  to solve complex problems and makes some modifications to standard methods and decision-making on important technical areas.

 

Responsibility

The successful candidate will apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market for ASIC/SOC design.  He/She should be able to work independently on various DV tasks and providing technical guidance to the DV team. The candidate would involve technically in the porting/creation of the verification environment for the new design, block and chip level test plan creation and implementation, coverage analysis, and regression cleanup.

公司简要介绍:

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