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r rr r
(Logic) Logic Design and Verification Engineer
r rLocation: Beijing
r rResponsibilities:
r rGLOBALFOUNDRIES IC Design Engineer will be working on most cutting-edge SoC (System on a Chip), ASIC, Digital, Mixed-Signal or Memory IP development for GLOBALFOUNDRIES WW clients. By employing the industry leading tools, methodology, and world-class semiconductor technologies ranging from 22nm, 14/12nm to 7nm and beyond, you will have the opportunities to participate in the delivery of various end-to-end silicon solutions, including architecture design and performance assessment, front-end logic design and verification, back-end implementation and optimization, a variety of IP development, methodology development and deployment, as well as chip hardware validation and support.
r rr r
Requirements:
r r1. EE/CS or equivalent background in digital, analog or mixed-signal IC design related areas.
r r2. Research and development experience in one or more of the following skill areas:
r r3. Research and development experience in one or more of the following application domains, will be a plus:
r r4. Good English and communication skills, and willingness to work with a global culture team. Skill of other languages will be a plus.
r r5. Good learning competency and be able to work in diverse areas in a dynamic environment.
r rHow to Apply:
r rIn order to improve the efficiency of resume screening, please pay attention to the format of application:
r rPlease email your Chinese and English resume in ONE MSWord or PDF file with your name (in Chinese) as the file name to China.careers@ with email subject as “___<1st Position Option>_<2nd Position Option>”, e.g. 张三_北京大学_北京_Logic_Backend.