[上海]英伟达半导体技术服务（上海）有限公司

The NVIDIA SOC group is now looking for ASIC   engineers with strong logic design or verification background. 

In this position, you will take part in all stages   to design modern complex GPU chips with state-of-art features and flows. To   implement various functions, you will work directly with different global   teams, as ARCH/SW, ASIC Design, CAD, Package, DFT and Physical Design teams.   Additionally, you will be involved in defining and creating methodologies   that create more efficient and flexible SOCs in future.

What you’ll   be doing:

-       Chip top   integration and assembling, design quality checks

-       Module-level or Chip-level   logic design, synthesis, timing constraints

-       Module-level or Chip-level   verification, both for function and test mode

-         Methodology   or Flow development for above tasks.

  What we need   to see:

-       BS / MS in   electrical / computer engineering and related.

-       Understand ASIC design/verification/implementation   flow

-       Familiar with design/verification languages as C/C++, Verilog or   VHDL

-       Know industrial   standard scripting language as Perl, or Python, TCL, Ruby

What stands out from the   crowd:

-       Excellent   analytical and problem solving skills

-       Fluent English and   excellent communication skills

-       Good team work   spirit, easy to cooperate with team members

-         Experience in   RTL build and design automation is a plus

-         Understand JTAG or DFT is a plus