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Job Description
Become a member of a world-class analog design team in providing high performance analog and mixed mode circuits for leading data communications and networking products, in 1gig and 10gig data rate. Designers have opportunities to design high performance analog-to-digital converters (ADC), digital-to-analog converters (DAC), filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL) or other timing circuits. Team members participate in circuit architecture, circuit implementation, design review, layout, and silicon validation.
Qualification
– Deep understanding on device physics.
– Familiar with analog layout design flow, familiar with EDA layout tools such as Virtuoso, laker and Calibre.
– Familiar with DRC/LVS/ERC rules, script skill is a plus.
– Familiar with CMOS technology, familiar with CMOS ESD and Latch up rules.
– Design experience in analog circuits is a plus, such as Op-Amps, bandgap, regulator, ldo, adc, dac, pll, serdes, etc.
– Familiar with EDA design tools is a plus, such as Hspice, Virtuoso, etc.
– Good team player and communication skills.
– Good English skill.