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Responsibilities:
Work closely with IP design team to define IP validation test plan for both pre-silicon (emulation) and post-silicon
Lead ASIC/ IP feature bring-up and validation, ensure coverage and schedule will meet silicon tape-out date
Drive cross-team (ASIC design, platform, driver) collaboration to enable IP features and optimize performance
Lead related engineering teams (global) to debug related issues for related IP domain
Work with characterization team to figure out the optimized clocks/voltages for related IP domain
Requirements:
BS-EE / BS-CE degree or advanced degree will be considered a plus.
Strong communication skills, good English required – verbal and written
Requires a good understanding of all PC Hardware elements (CPU, chipset, I/O devices, etc), Software (BIOS, Drivers, Operating System) and knowledge of PC architecture.
Requires a high degree of creativity and problem solving skills.
Knowledge with one of follows will be considered as a plus:
Knowledge and ability with using Oscilloscopes, Logic Analyzers
Schematic and PCB layout
Linux OS