[天津]飞思卡尔半导体（中国）有限公司上海分公司

职能类别:集成电路IC设计/应用工程师

Responsibilities:

- Participate in definition of both chip level and block level design-for-test structure and methodology

- Responsible for ATPG and model creation, memory Built in Self Test, Embedded Deterministic Test and Boundary Scan Test

- Work closely with design engineer for design optimization for test coverage improvement, test volume and test time reduction

- Responsible for scan pattern simulation based on timing files and gate-level netlist, assist backend engineer with scan chain insertion and timing analysis

- Work closely with Product Engineer to debug and solve scan pattern failures on tester

- Work as a global team to do complex SOC design and test

Requirements:

- Bachelors or Master Degree or University Degree or equivalent from Electronic, Electrical or Computer Science.

- Well communication and Inter-person skill.

- Good language skill in English, Pass CET-6.

- Have knowledge about EDA tool as well as VLSI design flow.

- Good knowledge in Verilog, VHDL and script language.

- Have used Unix/Linux system and EDA tool from Cadence, Synopsis, Mentor digital and/or analog developing

- Basic knowledge of MBIST, Scan is a plus

- RTL and Gate level simulation experience is a plus.

公司名称:飞思卡尔半导体（中国）有限公司上海分公司 公司类型:外资（欧美） 公司介绍:恩智浦半导体（纳斯达克代码：NXPI）致力于通过先进的安全连结及基础设施解决方案为人们更智慧安全、轻松便捷的生活保驾护航。作为全球领先的嵌入式应用安全连接解决方案领导者，恩智浦不断推动着互联汽车、端对端安全及隐私、智能互联解决方案市场的创新。恩智浦拥有超过60年的专业技术及经验，在全球逾33个国家设有业务机构，员工达31000人，2016年全年营业收入95亿美元。 恩智浦半导体于1986年以荷兰飞利浦公司半导体业务部的前身在中国设立办事处并开展业务，至今已在华深耕30年。公司以“科技激发创新，合作促进共赢”为理念，基于全球领先的技术优势和本地化服务，不断推动新的行业应用，助推中国半导体产业发展。为了更高效地整合资源并促进中国集成电路产业的协作发展，恩智浦中国区总部于2015年正式设立于上海。恩智浦目前在上海、北京、深圳、苏州等14个城市设立了办事处，拥有6座设计研发中心，一家位于天津的技术领先的工厂，并与多家中国企业建立了合资公司。