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Responsibilities:
- Responsible for SoC backend design, including Floorplan, Power Plan, Place & Route, Clock Tree Synthesis, Timing Closure, SI, Power Integrity analysis, Design for Yield, Physcial Verification.
- Work on Deep sub-micron process with Low Power architecture enablement.
- Responsible for scripting, TCL, MAKE, PERL.
- Global collaboration.
Requirements:
- Bachelors or Master Degree or University Degree or equivalent from Electronics.
- Well communication and Inter-person skill.
- Good language skill in English, Pass CET-6.
- Have knowledge about SoC backend design, hands-on experience preferred.
- Good knowledge in semicondoctor process.
- Experience on Unix/Linux system and IC design EDA tools.
- Experience with scripting - TCL, MAKE, PERL.
- Team player with the sense of responsibility.