ALTOBEAM(高拓迅达)公司诚聘

标 题: ALTOBEAM(高拓迅达)公司诚聘
发信站: 水木社区 (Wed Jul 4 09:57:38 2007), 站内

ALTOBEAM公司(ww***com[点击查看])以世界先进企业的企业文化，结合中国的情况，创建优秀的企业基因，培养及发挥员工的团队精神及个人能力。公司为员工提供一流的工作环境，具有竞争力的薪酬福利和广阔的发展平台。我们热切期待您的加入！公司急需以下职位的人才，请将简历寄至 staffing@altobeam.com.

1.Senior DSP Communication System Engineer / Manager / Director (4 openings)
–PHY Group
Responsibilities:
- Develop innovative DSP communication algorithms, such as timing recovery, channel estimation,Reed-Solomon decoder, LDPC decoder, etc.
- Participate in defining communication system architecture for next generation wireless communication chipset.
- Interact with RTL designers to implement DSP algorithms in FPGA and ASIC.
Requirements:
- Strong background on digital signal processing, OFDM, equalization, and coding.
- PhD EE or MSEE with 5+ years related industrial experience.

2. Digital Design (PHY) Engineer / Manager / Director (4 openings)
– ASIC Group
Responsibilities:
- Responsible for PHY layer RTL design and verification.
- Perform block level synthesis and timing check.
- Work with algorithm team to come up with the best architecture.
Requirements:
- MSEE or BSEE required
- 3+ years experience in communication related fields.
- Strong skills in Verilog RTL design and verification.
- Familiar with digital signal processing and MATLAB are highly desired.

3. ASIC SoC Design Engineer / Manager /Director (3 openings)
– ASIC Group
Responsibilities:
- Work with algorithm team to come up with the best architecture.
- Logic design using Verilog or VHDL.
- Perform block level synthesis and timing check.
- RTL modeling, simulation and verification
- Familiar with DFT (design for testing) techniques
- Power estimation and low power design techniques
- Excellent communication and presentation skills .
- Well organized, methodical, and detail oriented
- Team player and easy to work with
Requirements:
- MSEE or BSEE required
- 3+ years experience in communication related fields.
- Strong skills in Verilog RTL design and verification.
- Familiar with digital signal processing and MATLAB are highly desired
-Strong programming skills in Perl, C, and TCL

4. Analog IC Design Engineer (3 openings)
- Analog Group
Responsibilities:
- Design state-of-the-art analog CMOS Integrated Circuits, including ADC, PLL, filters, voltage and current reference, etc.
- Detailed design of analog/mixed-signal circuits including circuit analysis, design capture, layout,test, evaluation and debugging of prototype ICs and design support for mass production.
- Architects, designs and verifies circuits, logic, systems, algorithms, etc. to meet product requirements.
- Determines design approaches and parameters.
- Reports on design results through design reviews, provide input and assistance to other designers.
Requirements:
- MSEE required.
- 2+ years experience preferred.
- Solid background in CMOS integrated circuit design and analysis-
- Design experience of ADC, amplifiers, filters, OPAMP, and other analog circuit blocks are highly desired.

5. Hardware Engineer (3 openings)
– System Group
Responsibilities:
- Verify ASIC designs in the laboratory FPGA emulation platform
- Develop and execute intelligent FPGA test plans which complement simulation testing prior to ASIC tape-out
- Design wireless IC product reference platforms, bringup/validation platforms and application platforms.
- Interface with the system architecture group, outside vendors, design PCB board and coordinate lab technicians.
- Engage in extensive laboratory testing and characterization of prototype boards.
Requirements:
- BSEE or equivalent and a minimum of 5 years or, MSEE and a minimum of 3 years experience is required.
- Requires a solid understanding of both RF and digital board design and tools, including antenna design, analog circuit, filters, regulators, op-amps and digital design.
- Solid board level debugging skills and ability to oversee the PCB layout design is a must.
- An understanding of RF system and wireless communication knowledge is highly desired.

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36 修改:·yaotou 于 Jul 4 09:58:41 修改本文·[FROM: 218.249.84.*]
31 来源:·水木社区 ne***net[点击查看]·[FROM: 218.249.84.*]