说明:
此信息由中华英才网审核并发布(查看原发布网址),应届生求职网转载该信息只是出于传递更多就业招聘信息,促进大学生就业的目的。如您对此转载信息有疑义,请与原信息发布者中华英才网核实,并请同时联系本站处理该转载信息。
职位描述:
Job Description:
- Physical design from RTL or netlist to GDSII
- Typical tasks include Logic Rule Checker, Design for Testability, Floorplan, Clock tree generation, Place and Route, Crosstalk analysis and IR Drop check, Static Timing Analysis and test vector generation.
m and 90nm processes and designm, 0.13- Work on 0.18 methodologies.
- Report to Engineering Manager.
Requirements:
- Candidate must have a Bachelor or above in electronics engineering or related field.
- Dedicated and hard worker with good interpersonal and communication skills.
- Good study capability.
职责描述
- 完成RTL设计、版图设计到GDSII的流程的物理设计;
- DRC/LVS,可测性设计,Floorplan,Clock Tree 生成, 布线,串绕分析,IR Drop检查,STA分析,test vector生成等一系列的设计任务的完成;
- 对于0.18工艺,0.13工艺 及 90纳米工艺,做后端设计;
- 汇报给技术经理。
职位要求
- 具备微电子或工程类相关专业的学士或硕士学位;
- 工作努力且勤奋,具备团队协作精神
- 较强的学习能力