富士通微电子（上海）有限公司

IC design engineer (MCU Logic Design) 集成电路设计工程师 (单片机逻辑设计)

You will work together in a team to deal with customers and define new product specification, and write hardware manual, data sheet, design documents and test vectors for simulating the circuit functionality. You will be responsible for designing circuit using LCAD, Cadence, Synopsys, and run pre-layout & post-layout simulation on the design and simulation for measuring fault coverage of the design. Meanwhile, you need to write programs for enhancing design automation and fill in design checklists. Another part of your work is to attend design review after completing design on every new MCU, evaluate chips after fabrication, assist system engineers for chip debug and provide technical support for customers. 
Requirements:
- Degree or above in Electronics Engineering;
- Sound knowledge in VERILOG HDL;
- Independent, initiative and be able to work closely with others;

申请者需要和整个团队一同协作积极与用户进行沟通，并规定新产品的规格；同时负责制作硬件操作手册、数据手册、设计文件和进行电路性能仿真的测试向量。通过使用LCAD、Cadence、Synopsys & Hspice等软件设计电路，进行配线前和配线后电路性能仿真、设计故障率的检测。同时，还需负责撰写程序来提高设计自动化，并且填写设计清单。另一项工作任务是在每一次完成新的MCU设计后进行核查；在装配完成后对芯片进行评估并协助系统工程师进行调试，为客户提供技术支持。

职位要求;
- 电子工程本科或以上学历；
- 熟悉VERILOG HDL语言；
- 拥有逻辑设计或使用CAD工具(Cadence/Synopsys)的经验；
- 能够独立、主动地完成工作，具有团队合作精神。

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