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标 题: IBM ASIC Packaging/Noise Design Engineer
发信站: 水木社区 (Tue Aug 19 23:38:12 2008), 站内
IBM ASIC Packaging/Noise design engineer is responsible for large scale ASIC laminate analysis, system-module SI/PI co-simulation and ASIC on die floorplan, image/power bus design based on IBM 90nm, 65nm, 45nm and beyond technology with IBM/industry leading EDA tools.
Job Requirements:
1. Solid knowledge and industry experience in at least three of following areas:
- Package/system design experience
- Multiple layers PCB/Laminate (4+) layout experience
- Familiar with Industry SI/PI analysis process and tools (SigXp, Spice etc)
- Understand ASIC physical design process and tools (Cadence kits etc).
- Good ASIC backend design knowledge.
2. Good grasp of Perl/TCL scripts under Linux/Unix environment. C programming will be a plus
3. EE/ME/CS related background in system/chip design
4. Good communication skill in both English and Mandarin
5. Strong teamwork sense and self-motivation is required.
6. Strong technical leadership will be important consideration for senior positions
If you have interest please mail to yinwen372@
with subject"Apply IBM ASIC Packaging/Noise Design Engineer_Your name" and resume attached, thanks!
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1;35 来源:·水木社区
·[FROM: 58.33.245.*]
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