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澜起科技集团有限公司（Montage Technology）创立于2004年5月，下属四家子公司和一家分公司，分别是：澜起科技（上海）有限公司、上海澜起微电子有限公司、澜起半导体（上海）有限公司、苏州澜起微电子科技有限公司等四家子公司，以及澜起科技杭州分公司，目前共有员工300多人。
澜起科技集团总部位于上海漕河泾开发区内；苏州澜起微电子科技有限公司位于苏州工业园区内。澜起科技杭州分公司是澜起科技集团成功收购杭州摩托罗拉科技有限公司的机顶盒SOC芯片设计团队而成立的，位于滨江国家高新开发区内。
澜起科技集团是一家专业从事集成电路设计、开发和销售的企业。公司的设计研发平台包括了射频、数模混合、数字信号处理以及音频/视频信号处理的尖端技术，同时在市场营销、生产控制和综合管理等重要环节拥有丰富的经验。公司专注于数字企业及数字家庭领域市场，在数字企业方面，澜起科技拥有国际领先的高速、低功耗的芯片设计技术，开发出的应用于新一代服务器的内存缓冲器系列芯片，已成为全球云计算网络数据中心不可或缺的关键器件。在数字家庭领域，澜起科技拥有高清、标清数字电视接收的全套解决方案，产品涵盖卫星、地面和有线等各个领域。旨在为客户提供高性价比的产品和解决方案，共同带动产业的发展并实现双赢。
澜起科技自成立以来不断的得到国家和业界的认可和鼓励，并获得可喜的成绩和奖项：
澜起科技于2006年被评为上海市高新技术企业，并获得英特尔技术基金投资，公司所自主研发的产品多次在IIC中国及EDN获得技术创新及市场最佳表现奖项。澜起科技集团有限公司2008年被EET中国评为最具有潜力的IC设计公司，并入选德勒（Deloitte Technology）高科技、高成长中国50强及亚太500强。
公司汇集海内外业界技术管理英才，秉承独立创新，健康务实的公司风格，倡导朝气蓬勃、宽松友好的工作氛围，为员工提供积极良好的发展平台。
澜起科技，欢迎您的加入！
JOB TITLE: IC Design Engineer
职位：IC设计工程师
POSITION NO.: RD-SOC-Design
NUMBER: 5
JOB DESCRIPTION:
- Module-level architecture definition and design
- Module-level RTL implementation
- Simulation/Verification at both module level and system level
- Module-level synthesis and timing analysis
- Writing design spec and report
- FPGA/silicon debug on related modules
QUALIFICATIONS:
- Major in MSEE
- Solid knowledge on digital IC design
- Strong skills of Verilog RTL coding and simulation
- Familiar with C language
- Hands-on experiences on EDA tools, such as Cadence and Synopsys tools
TITLE: IC Design Engineer-2
职位：IC设计工程师-2
POSITION NO.: RD-DIG-A-2
NUMBER: 3
JOB DESCRIPTION:
- RTL or behavior level logic coding for modules.
- Module level synthesis/timing analysis.
- Writing complete design/verification reports.
- Simulation/Verification of functionalities at both module level and top level.
- Silicon debug of the related module functionalities.
- Writing test patterns for production tests.
QUALIFICATION:
- Major in BSEE or MSEE.
- Good English writing and reading skills.
- Solid knowledge of digital design building blocks (Data-path, Synchronizer, FIFO...)
- Strong skills of Verilog RTL coding, verification and debug.
- Solid knowledge of EDA tools such as Cadence NC-Sim, Synopsys DC, PT, Debussy etc.
- Familiar with Computer languages C, C , and one script language perl or python.
- Familiar with System-verilog language is a plus.
- Relevant experiences in DDR interface or MCU/FPGA design is a plus
- Good communication skill, team work spirit, self-motivated.
TITLE: IC Design Engineer
职位：IC设计工程师
POSITION NO.: RD-ALG
NUMBER: 1
JOB DESCRIPTION:
- Design, evaluate and verify CMOS analog circuits.
- Oversee layout and verification activities which include floor plan, LVS and DRC.
QUALIFICATION:
- BSEE or MSEE.
- Good fundamental in analysis and design of analog / mixed-signal circuits.
- Experience in Verilog, AHDL and/or Matlab.
- Ability to do layout and provide verification/debugging guidance.
- Solid knowledge of EDA design tools. (Analog artist, spectre, HSPICE and nc-verilog ...)
- Familiar with Computer languages such as C, C , perl.
- Experience in any of the following areas is preferred: PLL, high-speed I/O’s.
TITLE: IC Design Engineer
职位：IC设计工程师
POSITION NO.: RD-ALG-RF
NUMBER: 1
JOB DESCRIPTION:
- RF/analog IC design for tuners and receivers for multi-standard TV’s and other wireless systems
- Design and layout of IC blocks, such as LNA, mixer, VGA/PGA, LPF/BPF, VCO, crystal oscillator, PLL, ADC and DAC
- Simulation of RF and analog circuits and systems in Spectre/SpectreRF and Matlab
- Testing and characterization of IC blocks and chips in lab, and ATE and field environments
- IC process and package evaluation including device modeling and PDK
QUALIFICATION:
- MS or PhD in electric and electronic engineering
- Understanding receiver architectures for multi-standard TV products and other wireless systems
- Hands-on experiences in design of IC blocks to chip top levels in deep submicron CMOS technologies
- Proficient with simulation tools (Spectre/SpectreRF) and oversight of layout design
- Demonstrated ability for characterization of block and chip performances in lab and ATE environments
- Strong communication skills and also excellence as team player.
TITLE: Signal Processing Engineer
岗位名称：算法工程师
POSITION NO.: RD-DSP
NUMBER: 1
JOB DESCRIPTION:
- Advanced communication system R&D
- Signal processing algorithm implementation for data communication
- Participate in projects and work with hardware & software engineers for product development,debug & test support
QUALIFICATION:
- Ph. D or MS of related background
- Top student with strong self motivation; experienced candidate should have working knowledge in the area of digital communication
- All candidates are expected to have in depth knowledge in the area of digital communication
- Good communication skill, team work spirit, strong self-motivated
- Hands-on with Matlab, C/C , etc.
TITLE: Senior Application Engineer-Hardware-3
职位：资深应用工程师－硬件-3
POSITION NO.: MA-APL-D-3
NUMBER: 2
JOB DESCRIPTION:
- Develop system board for IC validation.
- Work on IC function verification and performance test.
- Develop evaluation board for demonstration and evaluation.
- Develop reference board for customer design.
- Support customers to facilitate their product development cycles.
QUALIFICATION:
- Major in BSEE or MSEE
- Experience in RF circuit design and debug.
- Experience in PCB layout.
- Experience in the hardware development of Set Top Box or Digital TV or tuner, familiar with tuner, demodulator, MPEG decoder, TV display or monitor, is a plus.
- Familiar with lab equipments, such as oscilloscope, spectrum analyzer, network analyzer, etc.
有志者请发送简历至
doris.su@
杭州研发经理：莫经理
guobing.mo@
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