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公司简介： |
天津瑞发科半导体校园招聘会
欢迎加入天津瑞发科半导体技术有限公司 天津瑞发科半导体技术有限公司位于天津华苑高新区，由多名归国硅谷半导体技术专家创立，专注基于高速模拟电路技术的消费电子SOC的设计开发和销售，产品主要应用于移动存储、安防监控产品等市场。 公司成立至今，在去年严重全球经济危机和半导体市场大衰退的背景下，凭借创业团队拥有的世界领先技术和对中国消费电子市场从标清到高清，从低速到高速的升级换代趋势的精准掌握，成功融得重要产业风险投资资金，并经过研发团队卓有成效的工作，在第一款SOC的产品开发方面进展顺利， 现为加快公司研发队伍的扩张和产品开发， 特招聘如下岗位。公司比照北京标准提供有竞争力的薪资福利待遇，员工分红及期权激励机制，拥有广阔的发展空间，我们期待您的加盟！ ============================================================================= 瑞发科半导体简介 投资方： 全球知名风险投资公司/基金主要产品：移动存储、安防监控SOC芯片与系统软件设计 ============================================================================= 招聘岗位：Firmware/软件研发、数字电路设计、数字电路验证、模拟IC/混合电路设计工程师，IC版图设计工程师学 历：硕士（含）以上(软件工程师可考虑优秀本科生) 专 业：电子、微电子、计算机、通信相关专业2013年应届毕业生 1, ASIC Logic Design Engineers ( entry levels) 5~8 persons
Functions:
Develop micro-architecture based on specification and customer input.
Develop implementation spec for sub-blocks.
Verilog design, DFT and timing closure.
Block level verification and FPGA prototyping.
Requirements:
Solid knowledge of semiconductor logic design and flow, familiar with Synthesis and Static Timing Analysis.
Strong programming skills (C/C /SystemC/Verilog).
Familiar with UNIX environment Perl/ TCL/bash/csh.
Strong analytical and problem solving capability.
Good communication skills and presentation skills, easy to work with.
Detail oriented, methodical.
Able to read and interpret English specifications and documents accurately.
MS or PhD degree in Computer Science or Electrical Engineering.
ASIC Logic Verification Engineers (entry levels) 3~5 persons
Functions:
Develop the infrastructure and test-bench for the validation of RTL design.
Develop directed and random tests.
RTL simulation and hardware emulation.
Lead the process/methodology development and execution.
Requirements:
Solid knowledge of semiconductor logic design and flow.
Strong programming skills (C/C /SystemC/Verilog).
Fluent in UNIX script programming (Perl/ TCL/bash/csh).
Have developed verification environment(s) and test cases.
Extensive RTL development experience (Verilog or VHDL) is a plus.
Good communication skills and presentation skills, easy to work with.
Detail oriented, methodical.
Fluent in English. Able to read, write and interpret English specifications and documents accurately.
MS or PhD degree in Computer Science or Electrical Engineering.
Firmware Engineers 2~3 persons
Functions:
Develop 8051 firmware for new products.
Requirements:
Familiar with PC hardware as well as embedded systems.
Solid background in C and C .
Experienced in 8051 assembly and firmware development.
BS, MS or Ph.D. degree in Computer Science or Electrical Engineering.
Software Engineers 2~3 persons
Functions:
Develop USB drivers for Microsoft Windows OS (XP, Vista, Windows 7).
Develop and maintain GUI software on PC for hardware debugging board and OEM customization tool.
Work with hardware development team to bring up and debug new products.
Customize software to suit OEM’s need.
Requirements:
Familiar with PC hardware, Microsoft Windows OS (XP, Vista, Windows 7) as well as embedded systems.
Solid background in C and C .
Extensive experience with user interface development using Win32 API.
Familiar with USB driver development on Windows OS (XP, Vista, Windows 7).
BS, MS or PhD in Computer Science or Electrical Engineering.
Physical Layout Engineer (IC版图设计工程师) 2-3 persons
Functions:
Analog and Mixed signal IC custom layout design.
Chip/Top level floorplanning and integration (Senior layout engineer).
Requirements:
Familiar with Cadence design environment (Virtuoso) and Verification such as Mentor Calibre.
Industry experience in layout of analog and mixed-signal ICs, such as high speed (GHz) analog circuits including PLLs and high-speed I/Os, etc.
Good understanding of design rules, device matching, and isolation techniques.
Basic understanding of semiconductor devices and IC process manufacturing.
Experience in top level floorplanning and integration is a plus.
BS degree in Electrical Engineering or Microelectronics.
Analog and Mixed-signal Design Engineer (模拟IC、混合电路设计工程师) 3~5 persons
Functions:
Analysis, design of high speed (1-6Gb/s) analog and mixed-signal integrated circuits for wireline applications, such as PLL, VCOs, high speed I/O, equalizer, SERDES, CDR, etc.
Custom design of high speed CMOS digital circuits.
Supervise layout of analog circuits and high-speed digital circuits.
Self-motivated and also able to work as member of a small team.
Requirements:
Experience and good understanding of analog and mixed-signal blocks, including some of the following areas: (a). PLL/DLL, regulators, VCOs, etc. (b). high speed (multi-Gbps) interfaces, wireline driver, receiver, equalizer, etc. (c). high speed SERDES, CDR.
Experience with design and layout tools such as Cadence Virtuoso, Cadence Spectre-RF, HSPICE, or other similar simulators and layout tools.
Good understanding of semiconductor devices and technology.
MS or PhD degree in analog and mixed-signal IC background.
============================================================================= 工作地点： 天津----天津华苑产业区华天道8号海泰信息广场B座1108 薪资福利：提供住宿补贴，优厚的薪资福利，完善的社会保障。 ============================================================================= 温馨须知： 1、 履历投递说明： 为提高履历处理效率，目前先接受电子履历应征方式。履历投递步骤如下： Step1：将完整电子履历文件名保存为“姓名_应征职位”。 Step2：将履历以电子邮件附件方式发送至hr@ 邮件主题格式为： [2013应届][应聘职位][学校科系][学历][姓名][联系电话] 范例：[2013应届][数字芯片][X学校X系][硕士][张大力][13XXXXXX] 切勿将履历直接贴于邮件正文内。
2、 请随时关注我们在校园BBS上发布的最新消息。
联系方式 瑞发科人事部
联络人: 石小姐
电邮: jing.shi@
地址：天津华苑产业园华天道8号海泰信息广场B座1108
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