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Job Description:
Be a part of the central engineering analog front end design team at Marvell china. The main responsibility is to perform analog layout and related drc/lvs/erc verification. Will be responsible for the analog layout from block level all the way to the top level integration and physical verification. The experienced analog design and layout engineers will provide the training and guidelines to ensure a smooth starting and high quality deliveries.
Job Requirement:
-BS degree, major in electronic engineering, computer science, or equivalent.
-Good communication skills in written and spoken in English.
-Good team-work spirit and communication skills. Hardworking and self-motivated under a high competition design/layout team.
-Understanding basic characteristic of CMOS transistors, resistor, capacitor and diode.
-Understanding of layout impact on device matching, noise coupling from signal, supply and substrate is a plus.
-Understanding the importance of signal flow, power/ground structure and block placement in layout floorplan is a plus
-Experience with UNIX or Linux OS, cadence virtuoso, Synopsys Laker is a plus.
-Experience with calibre drc&lvs is a plus.