- 工作地点：其它
- 职位：SoC Backend Design Engineer
- 信息来源：前程无忧(51JOB)
说明：
职能类别:集成电路IC设计/应用工程师
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Responsibilities:
- Participate in SoC team work on chip/block level physical designs.
- Responsible for low power SoC design with embedded analog, memories, and RF IP blocks.
- Chip and block level low power definition, RTL synthesis, logic/power equivalent check, clock tree synthesis, P&R, STA/timing closure, etc.
- Responsible for die size estimation, power distribution planning, floor-plan and power analysis.
- Responsible for chip-finishing, DFM, DRC/LVS physical verification.
Requirements:
- Bachelor or master degree, majoring in microeletronics, electronic engineering , computer science or relevant disciplines.
- Solid track records for SoC design in synthesis, Floor-plan, P&R, timing closure, DRC/LVS/etc. and chip-finishing flow.
- Knowledge & experience of SoC backend low power design flow.
- Hands-on experience using EDA tools, major on Cadence RC, EDI, ETS, EPS, and Calibre physical verification tools.
- Knowledge and experience of embedded MCU/IPs, flash NVM memory.
- Knowledge of physical integration of analog and RF IPs in SoC.
- Script coding ability of C/C++, Perl/TCL, in Linux/Unix environment.
- Well communication and collaboration with frontend design/DFT teams to achieve quality design deliverables on schedule.
- Communication skills (writing, listening and speaking esp. in English) good enough to effectively interface with world-wide global design teams.
公司简要介绍：
公司名称:恩智浦（中国）管理有限公司
公司类型:外资（欧美）
公司介绍:恩智浦半导体NASDAQ:NXPI)致力于通过安全连接及基础设施解决方案为人们更智慧、便捷的生活保驾护航。作为全球领先的嵌入式应用安全连接技术领导者，恩智浦不断推动着互联汽车、物联终端等智能安全互联应用市场的创新。恩智浦拥有超过60年的专业技术及经验，在全球逾35个国家设有业务机构，员工达45000人。
