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本岗位为实习生岗位, 我们更期待2019/2020毕业的硕士研究生应聘此岗位。
This is the internship position, Master graduates in 2019/2020will be preferred.
Micron ACG leveraging revolutionary Error-Correction(LDPC) algorithms and advance architecture to create most powerful system controller (SOC) and related firmware/software systems solutions to address fast growing NAND flash memory based storage products, which is essential for cloud computing, big data center, smartphone, tablet pc and all ultra-portal computing appliance.
As an ASIC designer at Micron ACG, you will be part of a team that developing leading edge SSD controller products for Micron.
Responsible:
RTL Coding, including block design, top level design, Lower power design, CPF/UPF design.
Verify design and debug in RTL-level, gate-level and PG gate level.
Simulation, Design constraints, Coding Style checking, Cross clock domain checking, Synthesis and timing closure,
Bug analysis and fixing, Formal check.
Area, Power, FIT estimation/measure, DFT related, ATE support.
Deliver design/verification/application documents/SPEC.
Work closely with algorithm engineer to develop/debug new IP/product.
Work closely with verification/system/Firmware engineer to verify/validate new IP/product.
Requirements:
Knowledge of digital circuit, and IC/IP background, Be interesting in developing and improving IP and flow.
Experience in Verilog code design and verification.
Experience in Unix/Linux OS, and scripting language like perl.
Familiar with C, UVM.
Familiar with ASIC frontend flow and related tools (synthesis, formal, STA and DFT tools).
Strong issue solving ability.
Strong communication skills, with the ability to convey complex technical concepts to other design peers in verbal and written form.
A high level of self-motivation and the ability to be a self-starter.
Excellent written, verbal and presentation communication skills.