
此信息由前程无忧(51JOB)审核并发布(查看原发布网址),应届生求职网转载该信息只是出于传递更多就业招聘信息,促进大学生就业的目的。如您对此转载信息有疑义,请与原信息发布者前程无忧(51JOB)核实,并请同时联系本站处理该转载信息。
Job Description
This is an entry level position for analog layout and circuit design. Engineer will focus on layout design and verification of complex analog circuits such as high performance analog to digital converters (ADC), digital to analog converters (DAC), filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase locked loop (PLL) or other timing circuits. Engineer will also have opportunities to participate in analog circuit simulation.
Qualification
BS/MS in EE.
Deep understanding on device physics.
Familiar with analog layout design flow, familiar with EDA layout tools such as Virtuoso, laker and Calibre.
Familiar with DRC/LVS/ERC rules, script skill is a plus.
Familiar with CMOS technology, familiar with CMOS ESD and Latch up rules.
Design experience in analog circuits is a plus, such as Op Amps, bandgap, regulator, ldo, adc, dac, pll, serdes, etc.
Familiar with EDA design tools is a plus, such as Hspice, Virtuoso, etc.
Good team player and communication skills.
Good English skill.