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1. Graduate/Postgraduate students major in EE/CS.
2. Good understanding on VLSI design methodology and theoretical knowledge.
3. Can be on site working for at least 3 days per week. Candidate with 4 days commitment on site working will be prioritized.
4. Candidate familiar with EDA tool like ICC2, Calibre, Redhawk, Primetime, Formal will be prioritized
5.Candidate with good script skills (like perl/tcl/python) will be prioritized
6.Candidate with Physical design working experience or power consumption analysis experience will be prioritized.