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工作职责
Collaborate with different engineers and different groups in a fast-paced design environment, voluntarily share information
Signal integrity (SI) design, including SerDes, power and interconnect designs. Evaluate new simulation and measurement tools
Perform basic SI measurements, such as TDR, TDT, crosstalk, jitter, eye pattern and power plane noise measurements to validate SI and power integrity (PI) designs. Document and communicate the results with US counterparts
Simulate and analyze design proposals, review results and provide recommendations on optimal design practices to internal and external design engineers
Develops solutions to complex signal integrity problems, which require regular use of ingenuity and creativity
技能要求
Bachelor/Master’s degree in EE or equivalent
Self-motivated. Desire to take challenges. Result-driven and details oriented
Strong interpersonal and communication skills are a must. Good communication skills in English and Chinese
Ability to take initiative
Simulation skills with SPICE and EM field solver. Experience with Hspice, and Power Integrity tools. Familiar with CST Microwave Studio and Ansys HFSS
Digital sampling oscilloscope, real-time oscilloscope and network analyzer experiences are required. Bert experience is a plus
Strong in transmission line fundamentals. Understand the fundamentals of time-domain vs. frequency-domain. In depth knowledge in circuit designs, as well as semiconductor designs
High-speed design experience is preferred