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Job Responsibilities:
·Responsible for all development aspects of the Cadence sign off flow for Specific foundries.
·Duties will comprise the development and maintenance for the Physical Rule Deck writing, Extraction techfiles,
·Signoff flow and associated customer support, including DRC, LVS, RCX, SI, PI, and DFM. He/she will also responsible for foundry technology file qualification.
The successful applicant will:
·Extensive knowledge with nanometer process technology from the angle of IC design;.
·Be experienced in the physical verification, parasitic extraction, rules writing and QA procedure, knowledge/experience with Cadence Virtuoso platform and Physical Verification solution is desired;
·Be accomplished in nanometer design Sign off procedures;
·Have comprehensive concept of Signal Integrity, Power Integrity and DFM technologies;
To be successful, the person in this position must be well suited in handling multiple tasks and customer programs at one time and be able to time manage each program appropriately. Good communication skill is required.