说明:
此信息由中华英才网审核并发布(查看原发布网址),应届生求职网转载该信息只是出于传递更多就业招聘信息,促进大学生就业的目的。如您对此转载信息有疑义,请与原信息发布者中华英才网核实,并请同时联系本站处理该转载信息。
Responsible for all development aspects of the Library/techfile qualification flow for Cadence design methodologies for Specific foundries.
Duties will comprise the development and maintenance for the library QA suit and associated customer support, including specification, synthesis, P&R, pre and post simulation, STA. He/she will also responsible for reference flow development for specific foundries.
The successful applicants will:
1. Have excellent programming skills, be familiar with the list languages like perl, tcl, csh, c/c++, Makefile etc. Skill and scheme experiences is preferred;
2. Have comprehensive concept of nanometer digital library development and QA methodology, be familiar with the contents of Artisan, or other popular library package, have the ideas of nanometer process and design rules;
3. Be familiar with Cadence LEF/DEF and Synopsys P&R technology file format, be familiar with Cadence or popular RC extraction tools and the tech file format; have
concept of Physical verification Tools, especially for DRC;
4. Be familiar with the typical ASIC digital solution. In-depth VLSI production experiences is preferred.
To be successful, the person in this position must be well suited in handling multiple tasks and customer programs at one time and be able to time manage each program appropriately. Good communication skill is required.