说明:
此信息由新水木BBS审核并发布(查看原发布网址),应届生求职网转载该信息只是出于传递更多就业招聘信息,促进大学生就业的目的。如您对此转载信息有疑义,请与原信息发布者新水木BBS核实,并请同时联系本站处理该转载信息。
标 题: 【招聘】IBM package、noise AE recruiting
发信站: 水木社区 (Mon Jun 30 21:42:34 2008), 站内
================Who we are=================
We, the IBM Chip Design (China) team are the IBM local IC design center in Chi
na of IBM STG MD(Microelectronic Division), which provide IC design
services to the clients all over the world and support IBM internal chip and s
emiconductor development missions.
=============What we do=====================
We provided IC design services to the clients all over the
world and support IBM internal chip and semiconductor development
missions:
-- We help our clients to design PowerPC based SoC design.
-- We provided backend design services (Timing, PD, package, SI,
etc -- ASIC design services in IBMs glossary :))
-- We provided frontend design services(logic design,
verification, FPGA demo, etc.)
-- We also do analog design, circuit design, foundry AE, etc.
=============Position=====================
Job description:
ASIC package(laminate) design, image(power bus) creating and verifying.
On die and package power system noise analysis, chip and system cominbational
SI/PI analysis.
Requirements:
Meet at least three items hereunder
1.Package/system design and SI experience.
2.Multiple layer(4+) PCB layout experience.
3.Familiar with phasicall design or SI/PI analysis process.
4.Familiar with Cadence layout/SI tool and Hspice.
5.Good ASIC physicall design background knowledge.
If you have interest , pls mail to:
yinwen372@
--
1;35 来源:·水木社区
·[FROM: 58.33.39.*]