[上海]创锐讯通讯技术（上海）有限公司招聘

Welcoming individual contributors to a world-class team

Atheros Communications (ww***com[点击查看]) is a fabless semiconductor company right in the center of the wireless revolution. Atheros" highly integrated chipsets are used by a virtual who"s who of leading vendors of PCs, consumer electronics devices and handset manufacturers. The company was founded in 1998, went public in 2004 and is head-quartered in Santa Clara, California with operations worldwide. Although past the start-up phase, Atheros is still young enough and small enough that individuals can make significant contributions. Because of this and the key markets the company serves, you will get tremendous exposure to new products and technologies right from the beginning of your career at Atheros.

Atheros established its Shanghai, China operation in May of 2005. The company is located in Zhangjiang High-tech Park, the region"s high technology, biotechnology and pharmaceutical hub. This area is widely known for having the largest concent rated semiconductor base in China and is the site of many of the world"s leading R&D centers for chip design, development and production.

Atheros" Shanghai operation is a fully operational research and development center. Here, we"ve cultivated a strong and growing engineering organization, now numbering over one hundred, to support the entire Asia Pacific region, including Korea, Japan and Taiwan. Our highly skilled engineers work on a wide array of projects from conception to completion - investigation, specification, development and product release - as well as applications engineering support. The organization supports the breadth of the growing Atheros product portfolio from WLAN for Home and Office, WLAN for Mobile, PAS/PHS, Wireless Network Processors, Gigabit and Fast Ethernet and Bluetooth solutions.

Atheros is that rare kind of company that combines an appreciation of individual contributions with supportive teamwork. You"ll experience this right away as you get down to work on advanced wireless products that appear on retail shelves worldwide within a short matter of months.

You"ll work with, and learn from, the best and brightest people in the wireless industry who, in turn, will look to you for your fresh approaches and new ideas. You"ll see that our passion for excellence and wireless know-how has resulted in a can-do culture where we focus on solutions, not problems.

Our matrixed organization, with minimum hierarchy, means that you join and find a spectrum of growth opportunities opening up for you immediately. And, we promote from within so you"ll enjoy the fruits of your discoveries and accomplishments. The Atheros culture offers abundant opportunities for travel, professional networking and customer relationship building. We appreciate ethnic and cultural diversity.

Join us and take charge of your future. A recognized contributor to a world-class team!

Please kindly send your resumes if you are interesting in these open positions as below and we will contact with you as soon as possible.

Our email address is shanghai-hr@

Position One: ASIC Design Engineer (Logic) – Shanghai

QUALIFICATION (DETAIL):

Education:

MS in Electrical/Electronics Engineering

Experience:

Ø         Academic background with Electrical Engineering, MS preferred

Ø         Good Knowledge of semiconductor electronics, logic design, circuit theory

Ø         Programming skills in C and/or PERL

Ø         Good communication skills and proven ability to work well within teams

Ø         Verilog and Synopsys experience is a plus

DESCRIPTION OF FUNCTION & RESPONSIBILITY:

Ø         ASIC Design for Ethernet communication products

Ø         Micro Architecture, Logic design

Ø         RTL coding, verification, emulation, synthesis, timing close-up, chip DVT

Position Two: System Hardware Design – Shanghai

QUALIFICATION (DETAIL):

Education:

MS in Electrical/Electronics Engineering

Experience:

Ø         Academic background with Electrical Engineering, MS preferred

Ø         Good Knowledge of circuit / logic design

Ø         Fundamental software / mechanical knowledge

Ø         Good communication skills and proven ability to work well within teams

Ø         Board / PCB design tools, FPGA experience is a plus

Ø         Capability to troubleshoot and solve problem

DESCRIPTION OF FUNCTION & RESPONSIBILITY:

Ø         System hardware design for Ethernet communication products

Ø         Evaluation / test / emulation board design

Ø         Circuit design, PCB layout

Position Three: ASIC Design Engineer (MBU/EBU) – Shanghai

QUALIFICATION (DETAIL):

Education:

MS in Electrical/Electronics Engineering

Experience:

Ø         One year experience with Verilog programming, logic synthesis and gate timing. A proven record of delivering successful ASIC"s to the market is preferred.

Ø         One or more advantages as following are highly desirable: A strong background in digital communication, signal processing and networking protocols; IC Design experiences in wireless communications and audio processing; Experiences with ARM/DSP, AHB bus and External interface development. 

Ø         Good communication skills in English.

Ø         Familiar with ASIC design flow

Ø         Good knowledge of IC design backend flows.

Ø         Experiences in IC life-cycle from conception, design, verification, top-level netlist with pads to tape-out, chip-testing and mass-production is a plus.

Ø         FPGA, PCB or embedded SW skill is a plus.

DESCRIPTION OF FUNCTION & RESPONSIBILITY:

The Digital Design Engineer will be responsible for designing ASIC"s. You will work closely with our architecture/algorithm engineers to explore ideas for next generation products and then develop RTL to tern these ideas into customer solutions.

Ø         Chip features specification and RTL design

Ø         Synthesis, verification, timing.

Ø         FPGA emulation, lab validation and debugging.

Position Four: DSP senior design Engineer – Shanghai

QUALIFICATION (DETAIL):

Education:

New graduates with MSEE.or Ph.D degrees major in digital communications (Ph.D from top universities preferred).

Experience:

Ø         Strong academic background of digital communication theory with proficient Matlab/C programming and simulation skills.

Ø         Extensive verilog RTL experience including design, verification, synthesis, and debugging.

Ø         Proficiency of Xilinx FPGA prototyping.

Ø         Solid hands-on experience of using different lab equipment such as oscilloscopes, logic analyzer, signal generator, spectrum analyzer, etc.

Ø         Fluency in English reading and writing.

Ø         IEEE 802.3 or previous Ethernet product development experience is a plus.

DESCRIPTION OF FUNCTION & RESPONSIBILITY:

The candidate will join a team of algorithm design and FPGA prototyping involved in the development of advanced digital signal processing algorithm for the physical layer of high speed wired data communication IC.

Ø         Design and develop PAM/QAM single/Multi-carrier transceivers, multi-input adaptive equalizers/echo cancellers, multi-dimentional trellis encoder/decoder, timing recovery, digital filters, interface with analog blocks and MAC/switch blocks.

Ø         Create bit-exact Matlab/C system model and perform simulation.

Ø         Design and simulate verilog RTL code using synopsys and cadence EDA tools.

Ø         Prototype, debug and verify RTL code on Xilinx multi-FPGA platform.

Ø         Perform coding, synthesis, timing closure, placement and route on FPGA…

Position Five：Software Engineer (WLAN) -Shanghai

QUALIFICATION (DETAIL):

Education:

BS/MS Computer Science or Electrical engineering

Experience:

Ø         2 years hands-on design/development experience in Linux/VxWorks and/or other embedded operating systems.

Ø         Excellent C programming, assembly language programming experiences

Ø         Experience with design and development of various data interface device drivers, Layer 2 (Data Link/MAC level) protocols and networking software

Ø         Experience in hardware bringup, BSP development for MIPS, ARM family processors,

Ø         Knowledge of embedded debugging environment tools such as in-circuit emulator and logic analyzer.

Ø         Team player with excellent communication and interpersonal skills

Ø         Strong analytical and problem solving skills

DESCRIPTION OF FUNCTION & RESPONSIBILITY:

Ø         To be part of the core WLAN engineering team to contribute to design, implementation and testing of wireless networking products. This individual will be working on developing board support package, low level device drivers, and network drivers.

Position Six: Software Engineer (MBU)-Shanghai

QUALIFICATION (DETAIL):

Education:

Bachelor or Master degree in Software Engineering, Computer Science, or related field

Experience:

Ø         Interface with the ASIC teams on chip features and programming model

Ø         Develop and maintain key features for Bluetooth software on an embedded OS, a Linux and/or Windows OS platform;

Ø         Support software releases during test and release cycles;

Ø         Experience with wireless drivers and/or other networking drivers

Ø         Knowledge of networking protocols and security concepts

Ø         Bluetooth development experience is highly desired

Ø         Familiarity with hardware debugging

Ø         Experience in release processes, build and packaging

Ø         Excellent verbal and written communication skills

Ø         Experience with embedded platform development

Ø         Experience with full software life cycle and delivery mechanisms

Ø         Knowledge of multi-threading and synchronization in a driver environment

Ø         Strong understanding of OS kernel internals

Ø         Product architecture, design, implementation and testing experience

Ø         Ability to work independently with minimal supervision

DESCRIPTION OF FUNCTION & RESPONSIBILITY:

Ø         Interface with the ASIC teams on chip features and programming model

Ø         Develop and maintain key features for Bluetooth software on an embedded OS, a Linux and/or Windows OS platform

Ø         Support software releases during test and release cycles