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Responsibilities:
- SOC integration and SOC IP design, integrate digital/analog and third-party IP, design SOC IP(clock/reset/low power/ioring),IC design flow(CPF/LEC/CLP/LINT/ECO)
- Design and verification for digital IPs
- ARM based SoC verification/debug/customer support.
- Participate in logic synthesis, DFT, timing analysis and closure.
- Write the technical documents/papers as required.
- Cooperate with and provide support to other functional teams (S&A, SW, TE/PE) in the NPI execution.
Requirements:
- Bachelor or master degree, majoring in microelectronics, electronic engineering , computer science or relevant disciplines.
- Good knowledge in logic design, experiences on the Verilog, VHDL, or System Verilog, experiences on logic design and simulations.
- Have knowledge about computer architecture, 8bit, 16bit or 32bit Micro-controller or Micro-processer is a plus.
- Prefer know-how of ARM or AHB bus system.