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职能类别:大学/大专应届毕业生
AMD System Management Unit (SMU) IP team delivers differentiated system management IP for all AMD products. You'll be working with the global team on complicated clock scheme, security processing, network on chip, power management, etc.
Responsibilities:
- Be responsible for micro-architecture and RTL implementation for SMU IP blocks
- Be responsible for synthesis/LEDA/CDC/LEC at IP level
- Work with front-end team and physical design team on timing closure
Job Requirements:
- Master degree with experience in ASIC area
- Familiar with Verilog HDL, Tcl, Shell, Perl programming
- Experience on synthesis, timing analysis, CDC and formal verification
- Good communication skill and fluent English
- Good team player and strong sense of responsibility to deliver on time